Heterogeneous Thermal Interface Material for Delamination Control
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Solution Overview
Problem
Delamination and pump-out are significant challenges in thermal interface materials (TIMs) used in electronic devices, leading to decreased thermal conductivity and increased operating temperatures.
Innovation Solution
A heterogeneous thermal interface material (HTIM) comprising two distinct TIMs with different properties is used, where a high thermal conductivity TIM is applied to high-power chips and a polymer-based TIM with high modulus of elasticity is applied to low-power chips to minimize strain, delamination, and warping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a single TIM with high thermal conductivity is used, then heat transfer efficiency is improved, but mechanical stability deteriorates due to strain and delamination
Solution Approach 1:
The TIM is divided into multiple discrete layers, each with different material properties optimized for specific functions. The first TIM layer provides high thermal conductivity for heat transfer, while the second TIM layer provides mechanical compliance and strain relief, resolving the contradiction between thermal performance and mechanical stability.
Solution Approach 2:
The patent uses a composite structure combining different TIM materials with complementary properties. The first TIM (e.g., metal-based or ceramic-filled) offers superior thermal conductivity, while the second TIM (e.g., polymer-based or silicone-based) offers elasticity and adhesion, creating a composite system that achieves both thermal efficiency and mechanical reliability.
2Reliability
If a TIM with high elasticity is used to prevent delamination, then mechanical stability is improved, but thermal conductivity deteriorates
Solution Approach 1:
The TIM structure is segmented into functional layers: the first TIM layer is optimized for thermal conduction, while the second TIM layer is optimized for mechanical compliance and delamination prevention. This segmentation allows each layer to excel at its primary function without compromising the other.
Solution Approach 2:
The patent employs a composite TIM system where materials with contrasting properties are combined in a layered architecture. The thermally conductive first TIM is paired with an elastic second TIM, creating a composite structure that achieves both high thermal conductivity and high resistance to delamination through synergistic material combination.
3Adaptability or versatility
If heterogeneous TIMs with different properties are used for different chips, then device performance is improved, but manufacturing complexity increases
Solution Approach 1:
The TIM is segmented into multiple layers that can be selectively applied to different chip types based on their thermal and mechanical requirements. High-power chips receive the full heterogeneous TIM structure, while low-power chips may receive simplified TIM configurations, allowing performance optimization without uniformly increasing complexity across all devices.
Solution Approach 2:
The patent applies different TIM material properties to different locations and chip types within the same package. High-power logic chips receive TIMs optimized for thermal conduction, while memory chips receive TIMs optimized for mechanical compliance. This local quality approach allows performance optimization tailored to specific chip requirements without unnecessarily complicating the entire TIM system.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The HTIM effectively transfers heat from high-power chips to cooling devices while preventing reflow and short circuits, enhancing mechanical stability and minimizing warping and delamination in integrated circuit chip packages.
Implementation Method 1
The first TIM comprises a material having a first thermal conductivity... The first TIM overlies the first IC chip... The HTIM bonds the first and second IC chips to the thermal cooling device
Implementation Method 2
The first TIM reflows when the first TIM reaches a first TIM reflow temperature
Implementation Method 3
The second TIM comprises at least a polymer material, the second TIM having a second modulus of elasticity greater than the first modulus of elasticity... to minimize strain, delamination, and warping
Data Source
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AI summary
A chip package assembly includes a first high-power chip, a second low-power chip, a thermal cooling device and a heterogeneous thermal interface material ("HTIM"). The thermal cooling device may overlie the first chip and the second chip. The HTIM includes a first thermal interface material ("TIM") and a second TIM. The first TIM overlies the first chip, and the second TIM overlies the second chip. The first TIM includes a material that has a first thermal conductivity and a first modulus of elasticity. The first TIM can reflow when the first die reaches a first TIM reflow temperature. The second TIM comprises at least a polymer material. The second TIM has a second modulus of elasticity that is greater than the first modulus of elasticity and a second thermal conductivity that is less than the first thermal conductivity.