Heterogeneous Volatile Memory Chips Bandwidth Power Trade-off
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Solution Overview
Problem
Current memory devices using homogeneous memory chips are inadequate for applications requiring both high bandwidth and low power consumption, as they fail to optimize bandwidth and power efficiency simultaneously.
Innovation Solution
A memory device comprising heterogeneous volatile memory chips with different bandwidth capabilities, where a first volatile memory chip operates at a first bandwidth and a second volatile memory chip operates at a second, higher bandwidth, connected through distinct channels to an SoC, allowing for flexible usage in applications needing varying performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If homogeneous memory chips are used, then device complexity is reduced and manufacturing is simplified, but the ability to simultaneously optimize bandwidth and power consumption is lost
Solution Approach 1:
The patent combines multiple heterogeneous memory chip types (e.g., HBM and GDDR) within a single memory device package, allowing the system to simultaneously access memory at different bandwidth levels and power consumption characteristics through a unified interface
2Adaptability or versatility
If a single memory chip type is used, then manufacturing precision requirements are simplified, but the ability to support varying application performance needs is reduced
Solution Approach 1:
The memory device is segmented into multiple independent memory chip modules, each capable of being manufactured with standard precision for its specific type, while the overall device provides diversified performance through the combination of different chip types
Data Source
AI summary
A memory device includes a first volatile memory chip that includes a first volatile memory cell array storing first data and that receives or outputs the first data at a first bandwidth, and a second volatile memory chip that includes a second volatile memory cell array storing second data and that receives or outputs the second data at a second bandwidth different from the first bandwidth.


