Patterned Heterojunction Structure for Stable HEMT Transconductance
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Solution Overview
Problem
Conventional high electron mobility transistors (HEMTs) face issues with linearity due to decreased electron saturation speed and increased device series resistance, leading to unstable transconductance with varying gate-source bias voltage.
Innovation Solution
A semiconductor structure with a patterned substrate and heterojunction structure featuring multiple polarization regions with varying barrier layer thicknesses and Al component proportions, allowing for parallel connection of heterojunctions to achieve mutual compensation of transconductances and stabilize transconductance across a large gate-source bias range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional HEMT structure is used, then high electron mobility and high power capability are achieved, but linearity deteriorates due to unstable transconductance
Solution Approach 1:
The patent divides the active region into multiple parallel heterojunctions by introducing strip trenches, creating first polarization regions (in trenches) and second polarization regions (on protrusions). This segmentation allows different transconductance characteristics in each region to be combined, achieving stable overall transconductance and improved linearity.
Solution Approach 2:
The patent applies different barrier layer thicknesses and Al component proportions in different regions: the barrier layer in first polarization regions has different thickness and composition than in second polarization regions. This local quality variation creates complementary transconductance characteristics that compensate for each other, stabilizing the overall device performance.
2Power
If gate-source bias voltage increases, then power capability improves, but transconductance becomes unstable and linearity decreases
Solution Approach 1:
The patent segments the device into multiple parallel heterojunctions with different transconductance characteristics. When gate-source bias voltage varies, these segmented regions provide complementary responses that stabilize the overall transconductance, enabling high power capability while maintaining linearity.
Solution Approach 2:
The patent changes key parameters including barrier layer thickness, Al component proportion, and strip trench dimensions to optimize the transconductance characteristics of different regions. These parameter variations enable the device to maintain stable transconductance across a wide gate-source bias range, improving both power capability and linearity.
3Speed
If electron saturation speed decreases and series resistance increases, then device performance degrades, but linearity is further compromised
Solution Approach 1:
The patent applies local quality variations by creating regions with different barrier layer properties (thickness and composition) to compensate for decreases in electron saturation speed and increases in series resistance. The first polarization regions in trenches and second polarization regions on protrusions have optimized local characteristics that maintain overall device linearity despite material limitations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the control ability of the gate electrode, maintains stable semiconductor mobility, reduces equivalent sheet resistance, and improves frequency characteristics, resulting in improved linearity and breakdown voltage.
Implementation Method 1
the heterojunction structure includes first polarization regions respectively corresponding to the first strip trenches and second polarization regions respectively corresponding to the first protrusions
Implementation Method 2
enhances the control ability of the gate electrode, maintains stable semiconductor mobility, reduces equivalent sheet resistance, and improves frequency characteristics
Data Source
AI summary
The present disclosure provides a semiconductor structure, including a substrate structure and a heterojunction structure, where a surface of the substrate structure is provided with first strip trenches and a first protrusion between any adjacent two of the first strip trenches, and the first strip trenches and the first protrusions extend in a first direction; where the heterojunction structure including a channel layer and a barrier layer, the heterojunction structure conformally covers the substrate structure, and the heterojunction structure includes first polarization regions respectively corresponding to the first strip trenches and second polarization regions respectively corresponding to the first protrusions.