Heterojunction Metal Oxide Thin-Film Transistor for High Electron Mobility
Solution Overview
Problem
Conventional thin film transistors with indium gallium zinc oxide (IGZO) semiconductor layers face limitations in electron mobility, which hinders their performance in monolithic 3D integrated systems, and existing deposition methods like sputtering struggle with nano-trench structures and composition control.
Innovation Solution
A thin film transistor with a heterojunction structure comprising a first oxide semiconductor layer of indium gallium oxide (IGO) and a second oxide semiconductor layer of zinc oxide (ZnO) is fabricated using atomic layer deposition (ALD), where the IGO layer is represented by In1-xGaxO1.5 with x ≤ 0.3, and the ZnO layer is 5 nm or less thick, enhancing electron mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional single-layer IGZO semiconductor structure is used, then manufacturing process is simple, but electron mobility is low
Solution Approach 1:
The single-layer IGZO semiconductor is segmented into multiple layers with different compositions (In-rich layer and Zn-rich layer), where each layer serves a specific function in enhancing electron mobility while maintaining manufacturing feasibility through sequential deposition
Solution Approach 2:
The patent creates a composite semiconductor structure by combining In-rich IGZO and Zn-rich IGZO layers, leveraging the complementary properties of each composition to achieve high electron mobility (≥60 cm²/Vs) that neither layer could achieve alone
2Productivity
If sputtering method is used for IGZO deposition, then deposition speed is fast and large area scalability is good, but film adaptability to nano-trench structures and composition control is poor
Solution Approach 1:
The patent replaces the physical vapor deposition mechanism of sputtering with chemical vapor deposition (ALD), where atomic-layer deposition enables precise compositional control through controlled chemical reactions, achieving the desired In-rich and Zn-rich layer compositions with atomic-level precision
3Productivity
If channel length is scaled down to 30 nm for high integration, then device density increases, but process complexity and manufacturing difficulty increase significantly
Solution Approach 1:
The patent changes the compositional parameters of the semiconductor layers (In-rich and Zn-rich compositions) to optimize electron mobility at the 30 nm channel length scale, allowing high-density integration while maintaining manufacturability through material composition optimization rather than purely dimensional scaling
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The heterojunction structure significantly improves electron mobility to 60 cm2/Vs or more, offering better control over physical properties and stability compared to single-layer IGZO transistors, with the ALD process ensuring precise thickness and composition control.
Implementation Method 1
a method for manufacturing the thin film transistor using an atomic layer deposition (ALD) process
Data Source
AI summary
A thin-film transistor comprises a substrate; an insulating layer formed on the substrate; an active layer formed on the insulating layer; and source and drain electrode layers formed on the active layer so as to be spaced from each other, wherein the active layer comprises: a first oxide semiconductor layer consisting of In, Ga and O; and a second oxide semiconductor layer which is formed on the first oxide semiconductor layer and which consists of Zn and O.The thin-film transistor having metal oxide semiconductor layers of a heterojunction structure has greatly improved electron mobility by comprising, as an active layer, oxide semiconductor layers of a heterojunction structure. In addition, the physical properties of a thin-film transistor to be manufactured can be controlled by adjusting the composition and thickness of oxide semiconductor layers through an atomic layer deposition (ALD) process.