Heterojunction Semiconductor Device Reducing Parasitic Capacitance

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Solution Overview

Problem

Conventional semiconductor devices with nitride semiconductors face challenges in achieving high breakdown voltage and low on-state resistance due to limitations in electrode and insulating layer configurations, which affect capacitance and resistance values.

Innovation Solution

The semiconductor device incorporates a specific configuration with multiple insulating layers, source and drain pads with branching structures, and strategically placed vias to reduce capacitance and enhance breakdown voltage while minimizing overlapping areas between source and drain regions, allowing for a more efficient active layer utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the overlapping area between source and drain regions is reduced, then breakdown voltage increases, but on-state resistance increases

Engineering Contradiction:

Improvebreakdown voltageVSAvoidon-state resistance

Core Design Contradiction:

StrengthVSReliability

Solution Approach 1:

The source and drain electrodes are divided into multiple segments (source electrode 120 with source pad 160, drain electrode 130 with drain pad 170) arranged in a interdigitated pattern. This segmentation allows the current to flow through multiple parallel paths, reducing the on-state resistance while maintaining adequate spacing between source and drain regions to achieve high breakdown voltage.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transitions from a conventional planar layout to a three-dimensional interdigitated structure with multiple electrodes and pads arranged in alternating sequences. This dimensional arrangement increases the effective conduction area without increasing the overlapping distance between source and drain, thereby reducing resistance while maintaining high breakdown voltage.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the device size is reduced, then integration density increases, but heat dissipation becomes more difficult

Engineering Contradiction:

Improvedevice sizeVSAvoidheat dissipation

Core Design Contradiction:

Area of stationary objectVSTemperature

Solution Approach 1:

The device is segmented into multiple small-sized electrode pairs (source electrode 120, drain electrode 130, gate electrode 140) arranged in an interdigitated pattern. This segmentation reduces the overall device footprint while distributing heat generation across multiple smaller regions, improving heat dissipation efficiency compared to a single large electrode structure.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent employs a dynamic current distribution approach where multiple parallel conduction paths are created through the interdigitated electrode arrangement. This allows current and heat to be distributed dynamically across multiple pathways, preventing localized overheating in compact device configurations.

Inventive Principle:

Principle #15Dynamics

3Reliability

If insulating layers are added between electrodes, then electrical isolation improves, but device complexity increases

Engineering Contradiction:

Improveelectrical isolationVSAvoidinsulating layer structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The insulating layer 150 serves multiple functions simultaneously: it provides electrical isolation between adjacent electrodes (source 120, drain 130, gate 140), acts as a structural support for the interdigitated arrangement, and defines the spacing between electrodes. This multi-functionality reduces the need for additional specialized insulating structures, simplifying the overall device complexity while maintaining reliable electrical isolation.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively increases breakdown voltage and reduces resistance, enabling the semiconductor device to sustain higher currents or maintain performance with a smaller device size, while also allowing for the generation of a two-dimensional electron gas for improved conductivity.

Implementation Method 1

The heterojunction is configured with two types of nitride semiconductors having different bandgap energies from each other and is able to generate a two-dimensional electron gas layer (2DEG layer) near the junction plane

Methodology Applied

Scientific EffectHeterojunction:

Implementation Method 2

Methodology Applied

Scientific EffectTwo-dimensional electron gas layer generation:

Data Source

PatentUS10950524B2Heterojunction semiconductor device for reducing parasitic capacitance

Publication Date: 2021.03.16 ANCORA SEMICON INC

AI summary

A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode, and the gate electrode are disposed on an active region of the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The first source pad and the first drain pad are disposed on the first insulating layer and the active region. The first source pad includes a first source body and a first source branch. The first source branch is electrically connected to the first source body and disposed on the source electrode. The first drain pad includes a first drain body and a first drain branch. The first drain branch is electrically connected to the first drain body and disposed on the drain electrode.