Vertical Heterolayer Stacks Using Low-Temperature Plasma Epitaxy
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Solution Overview
Problem
The challenge of controlled deposition of heterolayers in semiconductor stacks is exacerbated by high temperature processes, which lead to interdiffusion of atoms and lattice defect formation, while lower temperatures result in low growth rates, making the process economically inefficient.
Innovation Solution
A plasma-based epitaxy method is employed at temperatures below 650°C or 600°C to form heterolayers, using energetic species like radicals and metastables to deposit alternating semiconductor layers, with optional sacrificial layers, and buffer layers to mitigate interdiffusion and enhance growth rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high temperature processes are employed to increase deposition rate, then productivity is improved, but interdiffusion of atoms between heterolayers increases and lattice defect formation increases
Solution Approach 1:
The patent changes the temperature parameter from high temperature to low temperature (below 650°C or 600°C) to reduce interdiffusion and lattice defects. It also changes the deposition method parameter from thermal-based CVD to plasma-based epitaxy to maintain economical growth rates at lower temperatures.
Solution Approach 2:
The patent replaces the thermal-based chemical vapor deposition system with a plasma-based epitaxy system. This substitution uses plasma (energetic species) instead of thermal energy as the primary driving force for deposition, enabling low-temperature processing while maintaining acceptable deposition rates.
2Productivity
If high temperature processes are employed to increase deposition rate, then productivity is improved, but lattice defect formation increases reducing stack height
Solution Approach 1:
The patent changes the temperature parameter to below 650°C or 600°C to reduce lattice defect formation and enable growth of taller stacks. The deposition method is changed to plasma-based epitaxy to maintain economical growth rates at these lower temperatures.
3Manufacturing precision
If lower temperatures are employed to reduce interdiffusion and lattice defect formation, then manufacturing precision is improved, but growth rates become low making the process economically inefficient
Solution Approach 1:
The patent replaces thermal-based CVD with plasma-based epitaxy. The plasma provides energetic species that enable sufficient growth rates at low temperatures, making the process economically efficient while maintaining the precision benefits of low-temperature processing.
Solution Approach 2:
The patent changes the deposition method parameter from thermal-based to plasma-based, and sets the temperature parameter below 650°C or 600°C. This combination achieves both high precision (reduced interdiffusion) and economical growth rates.
4Reliability
If lower temperatures are employed to reduce lattice defect formation, then reliability is improved, but growth rates become low making the process economically inefficient
Solution Approach 1:
The patent replaces thermal-based CVD with plasma-based epitaxy. The plasma provides the necessary energy for economical growth rates at low temperatures, enabling both tall stack growth and economic efficiency.
Solution Approach 2:
The patent changes the deposition method to plasma-based epitaxy and sets temperature below 650°C or 600°C. This enables simultaneous achievement of high reliability (tall stacks with few defects) and economical growth rates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for thicker stacks with reduced interdiffusion and lattice defects, achieving higher critical thickness and economical growth rates for heterolayers.
Implementation Method 1
use of low temperature, plasma-based epitaxy
Implementation Method 2
plasma-based epitaxy method is employed at temperatures below 650°C or 600°C to form heterolayers
Implementation Method 3
Currently, the industry standard relies on thermal-based chemical vapor deposition (CVD) to obtain epitaxial layers
Implementation Method 4
the energetic species reacts with the first precursor to deposit the first layer on the substrate
Implementation Method 5
if high temperature processes are employed, interdiffusion of atoms between such layers can result
Data Source
AI summary
The present disclosure relates to vertical stacks including heterolayers, as well as processes and methods of their manufacture. Also described herein are apparatuses and systems for preparing and making such stacks.