Heterostructure Contacts for 2D Transistor Gate Scaling
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Solution Overview
Problem
2D transistors face high contact resistances due to challenges in selectively doping contact regions, limiting their performance in high-performance devices, especially at gate lengths below 10 nm, where silicon and III-V materials are less effective.
Innovation Solution
The use of a multilayer stack with interleaved semiconductor channel and gate layers, where the channel layers are made of intrinsic 2D materials and contacted by heterogeneous 2D materials to reduce contact resistance, allowing for efficient drive current and improved performance without significant short channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If 2D materials are used as channel in transistors, then gate length can be scaled below 10 nm with reduced short channel effects, but contact resistance increases by an order of magnitude compared to silicon devices
Solution Approach 1:
The patent applies local quality by using the same 2D material for both channel and contact regions but implementing selective doping: the channel region remains lightly-doped or intrinsic to maintain low off-state current, while the contact regions are heavily doped to reduce contact resistance. This spatial variation in doping concentration resolves the contradiction between achieving small gate lengths and maintaining low contact resistance.
Solution Approach 2:
The patent changes the doping parameter locally within the 2D material structure. By adjusting the doping concentration from lightly-doped in the channel to heavily-doped in the contact regions, the electrical properties are optimized for each functional area, enabling both sub-10nm gate length scaling and reduced contact resistance.
2Reliability
If selective doping is attempted in contact regions of 2D materials, then contact resistance can be reduced, but manufacturing complexity increases due to difficulty in achieving selective doping
Solution Approach 1:
The patent segments the 2D material into distinct functional regions (channel and contact regions) with different doping concentrations. This segmentation is achieved through selective doping processes that target specific areas, allowing contact resistance reduction without requiring overly complex manufacturing steps beyond standard semiconductor processing capabilities.
Data Source
AI summary
Transistors, devices, systems, and methods are discussed related to transistors including 2D material channels and heterogeneous 2D materials on the 2D material channels and coupled to source and drain metals, and their fabrication. The 2D material channels of the transistor allow for gate length scaling, improved switching performance, and other advantages and the heterogeneous 2D materials improve contact resistance of the transistor devices.