Heterostructure Fabrication via Electrical Discharge Machining

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Solution Overview

Problem

The challenge lies in cutting heterostructures comprising fragile semiconductor materials and ductile metallic layers, as conventional sawing techniques result in burrs and chips, and electro-erosion is ineffective for high resistivity semiconductor structures without adjustments.

Innovation Solution

The method involves modifying the heterostructure to position semiconductor layers between conductive structures of low resistivity, allowing electro-erosion cutting by integrating these layers between metal or low resistivity semiconductor structures, enabling efficient cutting of both fragile and ductile materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional sawing techniques are used to cut heterostructures, then the cutting process can be performed on both semiconductor and metal layers, but it results in significant burrs, chips, and requires incompatible cutting conditions

Engineering Contradiction:
Improvecutting process compatibilityVSAvoidcut surface quality
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent replaces the conventional mechanical sawing system with an electrical discharge machining (EDM) system. Instead of using mechanical blades that cause burrs and chips, the invention uses electrical discharges (sparks) between an electrode and the workpiece to erode and remove material. This substitution of mechanical cutting with electrical erosion eliminates the harmful effects of mechanical contact while enabling precise cutting of both semiconductor and metal layers with compatible process conditions

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If electro-erosion is used to cut ductile metal layers, then precise cutting with reduced burrs is achieved, but it is ineffective for high resistivity semiconductor structures without additional modifications

Engineering Contradiction:
Improvecut surface qualityVSAvoidapplicability to high resistivity semiconductors
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent introduces a conductive layer as an intermediary between the electrode and the high resistivity semiconductor structure. This conductive layer serves as a mediator that enables the electrical discharge to occur effectively by providing a conductive path, allowing the electro-erosion process to work on high resistivity semiconductors that would otherwise be incompatible with the method

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the electrical parameters of the electro-erosion process to accommodate high resistivity semiconductors. By adjusting parameters such as discharge current, pulse duration, and electrode geometry, the process is adapted to effectively erode high resistivity semiconductor materials while maintaining precision cutting of metal layers

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If conventional sawing is used for semiconductor materials, then precise cuts are achieved, but it requires oil-based lubricants and low rotation speeds that are incompatible with metal cutting conditions

Engineering Contradiction:
Improvecut precisionVSAvoidprocess condition compatibility
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent replaces the mechanical sawing system with an electrical discharge machining system that uses electrical fields instead of mechanical contact. This substitution eliminates the need for oil-based lubricants and allows operation at higher speeds, creating a universal process that can cut both semiconductor and metal materials under compatible conditions without the conflicting requirements of mechanical sawing

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise cutting of heterostructures with reduced burrs and chips, achieving cutting speeds suitable for industrial operations, particularly for centimetric chips, by utilizing electro-erosion techniques effectively across a wide range of semiconductor and metallic layers.

Implementation Method 1

electro-erosion, commonly called 'Electrical Discharge Machining' (EDM) which is a metal cutting technique widely used for example in precision mechanics

Methodology Applied
Scientific EffectElectrical Discharge Machining: Electrical Discharge Machining

Implementation Method 2

This technique consists in creating a series of electric discharges ('sparks' in English), in the space between a tool electrode and the part to be machined

Methodology Applied
Scientific EffectElectric Arc: Electric Arc

Data Source

PatentEP3533080B1Process for fabricating a heterostructure comprising a conductive structure and a semiconductor structure and including a step of electrical discharge machining
Publication Date: 2022.06.29 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • EP3533080B1 patent drawingFigure 1
  • EP3533080B1 patent drawingFigure 2~3
  • EP3533080B1 patent drawingFigure 4~5

AI summary

The subject of the invention is a process for fabricating at least one elementary heterostructure comprising: producing a heterostructure including at least one semiconductor structure of resistivity higher than or equal to 1 Ω.cm, said structure being located between two electrically conductive structures of resistivity lower than or equal to 0.1 Ω.cm; and cutting said heterostructure by electrical discharge machining so as to define at least said elementary heterostructure; the thickness of the semiconductor structure being smaller than about 1/10th of the thickness of at least one of said electrically conductive structures or of the total thickness of said electrically conductive structures.