Dynamic HEVC Decoder Scheduling on Multi-Core Processors
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Solution Overview
Problem
Current HEVC decoding techniques face inefficiencies in utilizing multi-core processors due to lack of dynamic scheduling algorithms that effectively distribute processing tasks across cores, leading to suboptimal performance and increased decoding times.
Innovation Solution
A rule-based framework for designing a dynamic scheduling algorithm for HEVC decoding on dual or multi-core platforms, which dynamically distributes processing tasks based on the presence of parallelization tools and intrinsic characteristics of the encoded stream, such as bit-rate, to optimize core usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If HEVC decoding is performed on multi-core processors without dynamic scheduling, then computational capacity is increased, but processing efficiency deteriorates due to suboptimal task distribution
Solution Approach 1:
The patent implements a dynamic scheduling algorithm that adapts task distribution across processor cores based on real-time workload characteristics and core availability. The scheduler continuously monitors and adjusts task allocation to match current system state, transforming the static multi-core processing into a dynamic system that optimizes performance under varying conditions.
Solution Approach 2:
The scheduling algorithm changes key parameters such as task assignment, core selection, and parallelization degree based on encoded stream characteristics (e.g., bit-rate, complexity metrics). By dynamically adjusting these parameters according to the specific video content being decoded, the system achieves optimal utilization of multi-core computational capacity.
2Ease of operation
If static scheduling methods are used to distribute tasks across cores, then task distribution is simplified, but decoding performance improves only marginally (up to 10% over static methods)
Solution Approach 1:
The system transitions from static to dynamic scheduling where task distribution is not fixed but adapts continuously based on workload characteristics. This dynamic approach allows the decoder to respond to varying video complexity and core availability, achieving significant performance improvements over static methods while maintaining reasonable operational complexity through automated decision-making.
3Productivity
If parallelization features (slices, tiles, wavefronts) are enabled in HEVC decoding, then data processing capacity is increased, but system complexity increases as these features must be managed
Solution Approach 1:
The patent leverages the HEVC parallelization features (slices, tiles, wavefronts) that naturally segment the decoding workload into independent units. Each segment can be processed by different cores simultaneously, increasing data processing capacity. The segmentation is managed through the dynamic scheduler that assigns these segments to appropriate cores based on current system state.
Solution Approach 2:
The dynamic scheduling framework provides a universal management layer that handles multiple parallelization features (slices, tiles, wavefronts) through a single unified algorithm. This multi-functional approach allows the system to utilize various HEVC parallelization features without requiring separate management mechanisms for each, thereby increasing processing capacity while controlling system complexity.
4Productivity
If encoding stream characteristics (bit-rate, complexity) are considered in scheduling, then task distribution is optimized, but scheduling algorithm complexity increases
Solution Approach 1:
The scheduling algorithm dynamically adjusts task distribution based on key parameters extracted from the encoded stream such as bit-rate and complexity metrics. By monitoring these parameters and adapting the scheduling decisions accordingly, the system achieves optimized task distribution that responds to the actual decoding workload characteristics without requiring overly complex analysis.
Data Source
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AI summary
A method is provided for decoding an encoded video stream on a processor having a plurality of processing cores includes receiving and examining a video stream to identify any macroscopic constructs present therein that support parallel processing. Decoding of the video stream is divided into a plurality of decoding functions. The plurality of decoding functions is scheduled for decoding the video stream in a dynamic manner based on availability of any macroscopic constructs that have been identified and then based on a number of bytes used to encode each block into which each picture of the video stream is partitioned. Each of the decoding functions is dispatched to the plurality of processing cores in accordance with the scheduling.