Hexagonal 3D Memory Structure with Intermediary Electrode
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Solution Overview
Problem
Existing electronic devices face challenges in integrating memory and selection elements due to difficulties in designing device architecture, limited material selection, and issues with sneak current and selector resistance in Xpoint access methods, particularly in 3D memory devices.
Innovation Solution
An electronic device with a hexagonal structure featuring conductors arranged in specific directions, including a selection element and a memory element formed of chalcogenide compound materials, with an electrode between them, allowing for independent addressing and integration of elements, and utilizing a phase-change material for the memory element.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If Xpoint access method is used with square packing, then cell integration degree is increased, but material selection is limited and selector cannot be properly driven when memory is in amorphous state
Solution Approach 1:
The patent transitions from conventional 2D square packing to a 3D hexagonal columnar structure, adding a vertical dimension to the electrode arrangement. This dimensional change enables new addressing schemes and allows independent control of memory and selector elements through vertically stacked conductors, resolving the material selection limitations of planar Xpoint access.
Solution Approach 2:
The patent introduces a separate electrode positioned between the selector and memory elements as an intermediary component. This intermediate electrode enables independent addressing and control of the selector and memory, allowing the memory to be in amorphous state while the selector can be properly driven, thus resolving the driving issue in conventional series-connected Xpoint structures.
2Reliability
If volatile selector such as ovonic threshold switch is used in series with memory, then sneak current problem is solved, but selector resistance must be significantly higher than memory resistance which limits material selection
Solution Approach 1:
The patent segments the conventional series-connected memory-selector structure into separate, independently addressable units by introducing additional conductors. This segmentation allows the selector and memory to be controlled independently through different voltage application schemes, maintaining sneak current suppression while enabling broader material selection for both components.
3Quantity of substance
If 3D stacking is implemented, then highly integrated memory elements are achieved, but device architecture design becomes difficult
Solution Approach 1:
The hexagonal columnar structure serves multiple functions simultaneously: it provides the stacking framework for 3D integration, defines the addressing scheme through its geometric symmetry, and organizes the conductor arrangements. This universal structural approach simplifies the overall device architecture design while achieving high integration, as the same geometric principle governs multiple aspects of the device design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the degree of integration, reduces line leakage, widens the selection range of materials for selection elements, and enables efficient addressing and operation of memory devices with reduced sneak current issues.
Implementation Method 1
utilizing a phase-change material for the memory element
Data Source
AI summary
The present disclosure discloses an electronic device having a hexagonal structure and an addressing method therefor. The electronic device according to one embodiment of the present disclosure includes a first conductor arranged in a first direction, a second conductor disposed on the first conductor and arranged in a second direction, a third conductor disposed on the second conductor and arranged in a third direction, a selection element disposed at a portion between the first and second conductors where the first, second, and third conductors intersect, and a memory element disposed at a portion between the second and third conductors where the first, second, and third conductors intersect.


