Hexagonal Semiconductor Diode Structure for High Current Density
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Solution Overview
Problem
Conventional semiconductor devices face challenges in increasing the allowable electrical current through diodes while maintaining a reduced size, particularly in electro-static discharge (ESD) protection circuits, where the size of the diode is restricted, making it difficult to enhance the circumferential length and thus the current capacity.
Innovation Solution
The semiconductor element features a substrate with first regions formed in regular hexagonal or elongated hexagonal shapes and second regions in frame or spiral shapes, both containing impurities of different conductive types, arranged to increase the circumferential length and allow for higher electrical current while minimizing the device's size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the size of the diode is increased to increase the circumferential length and allowable electrical current, then the allowable electrical current increases, but the device size increases
Solution Approach 1:
The diode structure is divided into multiple unit structures arranged in an array. Each unit structure contains first and second doped regions forming a portion of the p-n connection. By segmenting the diode into multiple units, the total circumferential length is increased while maintaining a compact overall device footprint, thus increasing allowable electrical current without proportionally increasing device size.
Solution Approach 2:
The patent transitions from a conventional linear or simple rectangular diode structure to a two-dimensional array of unit structures. The first and second doped regions are arranged in a pattern that creates a extended p-n connection interface in multiple directions. This dimensional arrangement increases the circumferential length within a limited area, resolving the contradiction between current capacity and device size.
2Reliability
If the circumferential length of the diode is increased to increase the allowable electrical current, then the allowable electrical current increases, but the device complexity increases
Solution Approach 1:
The diode is segmented into repeating unit structures that can be manufactured using standard semiconductor fabrication processes. Each unit contains first and second doped regions with specific conductivity types. This segmentation allows the complex function of high current capacity to be achieved through replication of simple, manufacturable units rather than a single complex structure.
Solution Approach 2:
The patent applies local quality by doping specific regions (first and second doped regions) with specific conductivity types (first and second conductivity types) within each unit structure. This localized doping creates the necessary p-n connection interface with optimized electrical properties at each location, while the overall array provides the increased circumferential length. The local quality approach maintains manufacturability while achieving the desired electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a significant increase in the allowable electrical current per unit area, enabling a reduction in the size of the semiconductor element and ESD protection circuit while maintaining high current capacity.
Implementation Method 1
Each of the first regions contains an impurity with a first conductive type... The second region contains an impurity with a second conductive type different from the first conductive type
Data Source
AI summary
A semiconductor device includes a voltage generation circuit configured to generate a specific voltage; a first terminal configured to output the specific voltage; a second terminal configured to receive a temperature sensitive voltage; an analog/digital conversion circuit configured to convert the specific voltage and the temperature sensitive voltage to digital values; a storage unit configured to store the specific voltage and the temperature sensitive voltage; and a third terminal configured to transmit the specific voltage and the temperature sensitive voltage to an external semiconductor device.


