Hexagonal Trench SiC MOSFET Layout for Lower On-Resistance
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Solution Overview
Problem
Conventional SiC MOSFET power semiconductor devices face challenges with high on-resistance due to low channel density and maximum electric field applied to the gate oxide film, which is not adequately addressed by existing trench gate structures.
Innovation Solution
The SiC MOSFET power semiconductor device features a trench gate with a hexagonal shape and honeycomb structure, along with a source and shield region that cross each other in unit cells, to increase channel density and reduce the maximum electric field applied to the gate oxide film, while ensuring reliability and ease of manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional rectangular trench gate structure is used, then the device structure is simple and easy to manufacture, but the channel density is low resulting in high on-resistance
Solution Approach 1:
The gate structure is segmented into multiple gates arranged in a honeycomb pattern, where each hexagonal gate is divided into six triangular regions. This segmentation increases the total gate perimeter and channel formation area within the same device footprint, thereby increasing channel density and reducing on-resistance while maintaining manufacturability through systematic replication of the hexagonal unit cell
Solution Approach 2:
The invention transitions from a conventional rectangular (2D planar) gate structure to a hexagonal geometry with inherent 3D spatial optimization. The hexagonal shape provides more efficient space utilization with higher perimeter-to-area ratio, enabling increased channel density in the planar dimension while the vertical trench structure adds the third dimension for enhanced electric field control and channel formation
2Reliability
If a rectangular trench gate with source trench structure is used, then the electric field is dispersed to some extent, but the channel region area remains small resulting in low channel density
Solution Approach 1:
The invention employs asymmetric positioning of source regions relative to the hexagonal gate structure. Source regions are strategically placed to contact specific sides of the hexagonal gate, creating asymmetric channel formation zones that optimize both electric field distribution and channel area. This asymmetric design allows maximum channel density while maintaining effective electric field dispersion through the hexagonal geometry
Solution Approach 2:
The hexagonal gate structure serves multiple functions simultaneously: it provides electric field dispersion through its geometric shape, maximizes channel formation area through increased perimeter, and enables efficient space utilization for source region placement. This multi-functionality resolves the contradiction between electric field management and channel density enhancement
3Productivity
If the trench gate has a hexagonal shape with honeycomb structure, then channel density increases improving on-resistance, but the device structure becomes more complex
Solution Approach 1:
The device is segmented into repeating hexagonal unit cells that form a honeycomb pattern. Each unit cell is independently structured with well-defined regions, allowing the complex hexagonal geometry to be manufactured through systematic replication rather than monolithic fabrication. This segmentation reduces manufacturing complexity while maintaining the high channel density benefits of the hexagonal structure
Solution Approach 2:
The invention optimizes specific geometric parameters of the hexagonal structure, such as the side length, angle, and spacing between adjacent hexagons, to achieve maximum channel density within manufacturing constraints. By carefully controlling these parameters, the device achieves high performance while maintaining compatibility with existing fabrication processes, thereby reducing the impact of structural complexity
4Reliability
If source and shield regions cross in unit cells, then reliability is ensured and maximum E-field is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The unit cell is segmented into distinct source regions and shield regions with clearly defined boundaries and spatial relationships. The crossing configuration is systematically arranged within each hexagonal unit cell, creating repeatable patterns that simplify alignment and positioning during fabrication. This segmented design reduces manufacturing precision requirements compared to continuous or irregular region configurations
Solution Approach 2:
The shield regions are strategically positioned to create equipotential zones that uniformly distribute the electric field across the gate oxide. This equipotential design naturally reduces the maximum E-field concentration without requiring extremely precise manufacturing tolerances, as the geometric arrangement itself provides field uniformity that is robust to typical fabrication variations
Data Source
AI summary
Disclosed are a SiC MOSFET power semiconductor device and a method of manufacturing the same. More particularly, a SiC MOSFET power semiconductor device and a method of manufacturing the same are disclosed, including a trench gate having a hexagonal shape in a plan or layout view, to improve on-resistance (Rsp) characteristics and increase channel density.


