High-Frequency Transistor Input Matching for Gain and Harmonic Control
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Solution Overview
Problem
High-frequency semiconductor amplifiers face a gain decrease due to the input second-order harmonic matching circuit being capacitive for fundamental waves, leading to increased gate-source parasitic capacitance, which affects power added efficiency and gain.
Innovation Solution
A high-frequency semiconductor device with a harmonic processing circuit featuring a first unit transistor cell and a second unit transistor cell, along with capacitors and inductors on the semiconductor substrate, where the first capacitor and first inductor resonate at the fundamental wave frequency, and the second capacitor and second inductor resonate at the second-order harmonic frequency, ensuring impedance is short-circuited for the second-order harmonic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the input second-order harmonic matching circuit is directly connected to the gate pad without bonding wire influence, then the second-order harmonic impedance can be ideally short-circuited, but the circuit becomes capacitive for fundamental waves causing gain decrease
Solution Approach 1:
The matching circuit is divided into two separate resonance circuits: one for fundamental wave frequency and another for second-order harmonic frequency. This segmentation allows independent optimization of each frequency's impedance characteristics, enabling the fundamental wave circuit to maintain gain while the harmonic circuit improves power added efficiency.
Solution Approach 2:
A fundamental wave resonance circuit acts as an intermediary between the second-order harmonic matching circuit and the gate pad. This intermediary circuit resonates at fundamental wave frequency to cancel capacitive effects, thereby maintaining gain while allowing the second-order harmonic circuit to provide ideal short-circuiting for improved power added efficiency.
2Loss of energy
If the input second-order harmonic matching circuit is provided outside the semiconductor substrate and connected through bonding wire, then the resistance and inductance of bonding wire affect the short-circuiting performance, but the circuit configuration becomes more flexible
Solution Approach 1:
The second-order harmonic matching circuit is merged with the semiconductor substrate, eliminating bonding wires and their associated resistance and inductance. This integration achieves ideal short-circuiting performance for second-order harmonic frequency, maximizing power added efficiency without the performance degradation caused by external connections.
3Power
If the fundamental wave resonance circuit is added to cancel capacitive effects, then gain is maintained, but the circuit complexity increases
Solution Approach 1:
The fundamental wave resonance circuit serves multiple functions: it cancels capacitive effects to maintain gain, and its inductive reactance works in conjunction with the second-order harmonic matching circuit to achieve ideal short-circuiting at harmonic frequency. This multi-functionality reduces the need for additional separate components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves both high power added efficiency and high gain by maintaining impedance openness for fundamental waves and short-circuiting for second-order harmonics, improving performance compared to conventional designs.
Implementation Method 1
the first capacitor and first inductor resonate at a frequency of a fundamental wave
Implementation Method 2
each of impedance on the first capacitor side as seen by the input electrode of the first unit transistor cell and impedance on the first inductor side as seen by the input electrode of the second unit transistor cell is short-circuited at a frequency of a second-order harmonic
Data Source
AI summary
The present invention relates to a high-frequency semiconductor device. A conventional high-frequency semiconductor device including an input second-order harmonic matching circuit has such a problem that gain decrease occurs. In a high-frequency semiconductor device (100) of the present invention, two adjacent unit transistor cells (7) and (8) are connected to one input second-order harmonic matching circuit (19) provided on an upper surface of a semiconductor substrate (1). The input second-order harmonic matching circuit (19) includes a first capacitor (13), a first inductor (14), a second capacitor (15), and a second inductor (16). The first capacitor (13) and the first inductor (14) resonate at the frequency of a fundamental wave, and each of impedances as seen by input electrodes of the two unit transistor cells (7) and (8) is short-circuited at the frequency of a second-order harmonic.