Hierarchical Bitmap Storage Address Allocation
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Solution Overview
Problem
Existing buffer management solutions, such as FIFO and bitmap management, face inefficiencies in allocating and retrieving storage addresses, especially when dealing with large quantities of buffer units, as they require extensive resource consumption and slow search times for idle bits.
Innovation Solution
A hierarchical bitmap method is introduced, where a level-2 bitmap searches bidirectionally across N level-1 bitmaps to efficiently allocate storage addresses by identifying idle bits and updating their status, reducing resource consumption and improving allocation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single large bitmap is used to manage buffer addresses, then all buffer addresses can be tracked, but the search time for idle bits becomes excessively long when dealing with large quantities of buffer units
Solution Approach 1:
The patent divides a large bitmap into multiple smaller sub-bitmaps (first bitmap, second bitmap, third bitmap, fourth bitmap). Each sub-bitmap manages a portion of the buffer addresses. This segmentation allows the system to track a large number of buffer units while reducing the search time for idle bits, as the search is distributed across multiple smaller bitmaps rather than one large bitmap.
2Quantity of substance
If a single large bitmap is used to manage buffer addresses, then all buffer addresses can be tracked, but the resource consumption increases significantly
Solution Approach 1:
The patent segments the large bitmap management task into multiple smaller sub-bitmaps, each handling a portion of the buffer addresses. This reduces the memory resources required for each individual bitmap structure and decreases the complexity of address management operations.
Solution Approach 2:
The patent introduces bitmap management units as intermediary components that manage the sub-bitmaps. Each bitmap management unit handles a specific portion of the buffer addresses, acting as an intermediary between the buffer memory and the main control logic. This distribution of management responsibilities reduces the overall system complexity and resource consumption.
3Ease of operation
If FIFO buffer management is used, then address allocation is simple, but the resource consumption is high with formula r=n*log2n bits
Solution Approach 1:
The patent uses bitmap structures as a simplified representation of buffer address states. Instead of using complex FIFO data structures that require n*log2n bits, the system uses bitmaps where each bit represents the state of a buffer address. This copying approach (using bits to represent address states) significantly reduces memory resource consumption while maintaining ease of operation.
Data Source
AI summary
A method and apparatus for allocating storage addresses are disclosed. The method includes: receiving a storage address allocation request; searching a level-2 bitmap in a hierarchical bitmap in bidirectional mode; outputting an idle bit according to the result of searching in the level-2 bitmap; obtaining a storage address according to the output idle bit, and allocating the storage address. The apparatus includes: a first receiving module, configured to receive a storage address allocation request; a first searching module, configured to search a level-2 bitmap in a hierarchical bitmap in bidirectional mode for an idle bit, wherein the hierarchical bitmap includes N level-1 bitmaps and the level-2 bitmap; and an allocating module, configured to: obtain a storage address according to the output idle bit in the level-2 bitmap, and allocate the obtained storage address.