Hierarchical Buffer Structure for Packet Router Conflict Resolution

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Solution Overview

Problem

Packet routers face challenges in managing conflicts between packets destined for the same output port, leading to variable delay and throughput due to temporary storage, which can differ significantly across various designs under the same traffic load and pattern.

Innovation Solution

A packet-router architecture with interconnected buffer modules forming hierarchical levels, where each higher level has more modules than the lower level, and interconnect fabrics connecting buffer modules to manage packet flow and resolve conflicts efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If packets are temporarily stored in buffer modules to resolve conflicts, then packet routing capability is improved, but router delay and throughput variability worsen

Engineering Contradiction:
Improvepacket routing capabilityVSAvoidrouter delay
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The buffer structure is segmented into multiple levels (first level, second level, third level) with each level containing multiple buffer modules. This hierarchical segmentation allows packets to be routed through different paths and levels, reducing congestion at any single buffer and minimizing delay variability while maintaining routing flexibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical dimension to the buffer structure, organizing buffers across multiple levels rather than a single flat layer. This dimensional expansion creates additional routing dimensions, allowing packets to bypass congested areas by moving between levels, thereby reducing delay while preserving adaptability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If more buffer modules are added to handle traffic load, then packet handling capacity is improved, but implementation complexity worsens

Engineering Contradiction:
Improvepacket handling capacityVSAvoidimplementation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The buffer system is divided into multiple levels and modules, allowing the total buffer capacity to be distributed across many small, manageable units. Each buffer module can be implemented independently using standardized designs, which reduces the complexity of implementing large buffer capacities while maintaining high packet handling capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The hierarchical structure nests buffer modules within levels, and levels within the overall buffer system. This nested organization allows complex buffer capacities to be built from simpler, repeating modular units, making implementation more manageable while achieving high packet handling capacity.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Adaptability or versatility

If hierarchical buffer levels are implemented, then trade-off between performance and complexity is improved, but buffer structure complexity worsens

Engineering Contradiction:
Improveperformance characteristics trade-offVSAvoidbuffer structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The buffer system is segmented into distinct hierarchical levels with clear separation of functions. Each level can be independently configured and optimized, allowing performance characteristics to be tuned without redesigning the entire buffer structure. This modular segmentation enables flexible performance trade-offs while managing complexity through repetition of standardized level designs.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8923315B2Packet router having a hierarchical buffer structure
Publication Date: 2014.12.30 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8923315B2 patent drawing
  • US8923315B2 patent drawing
  • US8923315B2 patent drawing

AI summary

A packet-router architecture in which buffer modules are interconnected by one or more interconnect fabrics and arranged to form a plurality of hierarchical buffer levels, with each higher buffer level having more buffer modules than a corresponding lower buffer level. An interconnect fabric is configured to connect three or more respective buffer modules, with one of these buffer modules belonging to one buffer level and the other two or more buffer modules belonging to a next higher buffer level. A buffer module is configured to implement a packet queue that (i) enqueues received packets at the end of the queue in the order of their arrival to the buffer module, (ii) dequeues packets from the head of the queue, and (iii) advances packets toward the head of the queue when the buffer module transmits one or more packets to the higher buffer level or to a respective set of output ports connected to the buffer module.