Hierarchical Bus Arbitration with Dynamic Priority Adjustment
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Solution Overview
Problem
In data processing systems with hierarchical bus structures, the fixed-priority arbitration scheme can lead to inefficient data processing due to prolonged denial of bus access to circuit modules with lower priority levels, especially when data transfer time limits change with system operation modes, and existing solutions fail to accurately arbitrate bus access requests between superordinate and subordinate hierarchical buses.
Innovation Solution
The system feeds priority information from superordinate hierarchical buses to the subordinate hierarchical bus for consistent arbitration, allowing dynamic adjustment of priority levels based on changing data transfer time limits, ensuring that bus access rights are accurately allocated according to updated priority levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If fixed-priority arbitration scheme is used in hierarchical bus structure, then bus access control is simplified, but lower priority circuit modules experience prolonged denial of bus access causing interrupted operation and decreased processing efficiency
Solution Approach 1:
The patent applies dynamics by making the priority levels adjustable rather than fixed. The priority level of each circuit module can be dynamically changed based on waiting time information, allowing the system to adapt to changing conditions and prevent prolonged denial of bus access to lower priority modules.
Solution Approach 2:
The patent implements feedback by monitoring the waiting time of each circuit module for bus access and using this information to adjust priority levels. The bus controller receives waiting time information from circuit modules and modifies arbitration decisions based on this feedback, ensuring that modules experiencing excessive waiting time can increase their priority.
2Ease of operation
If priority levels are dynamically adjusted based on waiting time, then bus access fairness is improved, but arbitration complexity increases
Solution Approach 1:
The patent segments the arbitration function into two parts: the bus controller handles high-level arbitration decisions based on priority levels, while individual circuit modules monitor and report their own waiting time information. This segmentation distributes the complexity and simplifies the overall arbitration mechanism.
Solution Approach 2:
The patent applies self-service by having circuit modules autonomously monitor their own waiting time and report this information to the bus controller. Each module serves itself by tracking its access patterns, reducing the burden on the bus controller and simplifying the arbitration logic.
3Ease of operation
If priority levels are updated sequentially in round-robin fashion, then bus access fairness is improved, but waiting time for high priority modules increases
Solution Approach 1:
The patent changes the parameter being optimized from fixed round-robin sequence to dynamic priority levels based on waiting time. By adjusting priority levels according to actual waiting time conditions, the system can maintain fairness while reducing waiting time for high-priority modules when they need immediate access.
Data Source
AI summary
In a hierarchical bus structure employing a fixed-priority bus access arbitration scheme, accurate arbitration of bus access requests can be carried out even in situations where priority levels are updated according to a system operation mode. In each of a plurality of superordinate hierarchical bus circuits, access requests from respective bus masters included in each corresponding bus master group are arbitrated according to priority levels assigned thereto, and based on the result of the arbitration, a priority communication signal PRA/PRB indicating a priority level of each access-request-permitted bus master is fed to a subordinate bus controller. In a subordinate hierarchical bus circuit, under control of the subordinate bus controller, access request arbitration is carried out according to the priority communication signal PRA/PRB to select a superordinate hierarchical bus circuit or bus master having the highest priority level.