Hierarchical Congestion Control Hardware for Data Center Networks
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Solution Overview
Problem
Data center networks face congestion issues that lead to increased delays, packet loss, and violations of service level agreements (SLAs) due to slow response times, excessive processor bandwidth consumption, and costly deep buffering, particularly in multi-tenant environments with high-speed servers.
Innovation Solution
The implementation of hierarchical congestion control with congested flow identification hardware, which isolates rate adjustments for flows, tenants, and virtual machines using a hierarchy of transmit shapers, allowing for fast response to congestion notifications without packet modification or queue switching, and frees up processor bandwidth by associating congested flows with shapers in hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If software implementations of congestion control are used, then congestion control functionality is provided, but response time is slow and processor bandwidth is excessively consumed
Solution Approach 1:
The patent replaces software-based congestion control mechanisms with hardware-based congestion control circuitry. The congestion control logic is implemented in dedicated hardware circuits within the network interface controller, eliminating the need for software processing and achieving faster response times while reducing processor bandwidth consumption.
Solution Approach 2:
The hardware congestion control circuitry autonomously monitors network traffic conditions, detects congestion, and adjusts flow rates without requiring processor intervention. The circuit includes congestion detection logic and flow rate adjustment mechanisms that operate independently in hardware, enabling self-service congestion control.
2Speed
If HULL hardware acceleration technique is used, then response speed is improved, but deep buffering is required and packet re-ordering occurs
Solution Approach 1:
The patent implements per-flow queueing where each data flow has its own dedicated queue in the network interface controller. This segmentation prevents packets from different flows from being mixed and reordered, while still enabling fast hardware-based congestion control for each individual flow.
3Device complexity
If congestion control is implemented without tenant traffic isolation, then processing is simplified, but service level agreements are violated
Solution Approach 1:
The patent implements tenant-level segmentation where traffic from different tenants is separated into distinct queues and subjected to independent congestion control. The hardware circuitry maintains separate flow rate limits and congestion detection for each tenant, ensuring service level agreement compliance while keeping the overall system manageable through dedicated hardware resources.
Data Source
AI summary
Hierarchical congestion identification and control hardware supports multi-level congestion control at flow, tenant and virtual machine (VM) levels. Hardware implementation expedites response to congestion notifications and frees-up processor bandwidth. A hierarchy of transmit shapers in a transmit ring scheduler isolate rate adjustments for flows, tenants and VMs. The hierarchy of shapers provide a hierarchy of congestion control nodes to control flows and aggregate flows. Hardware quickly associates congested flows with shapers before or after receiving a congestion notification. The associations may be used by any flow control algorithm to selectively rate-control shapers to control flow rates. Shaper associations and configured states, scheduler configuration, congestion states, thresholds and other flow information may be stored and monitored to filter data flows that need attention and to raise alerts at flow, tenant and VM levels. Congestion control occurs fast and without packet modification, queue or ring switching or queue accumulation.