Hierarchical Die Address Decoding for Chiplet Interconnects
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Solution Overview
Problem
The complexity of address decoding in chiplet technology increases due to diverse die structures and complex topologies, leading to increased configuration information and circuit area overheads, limiting flexibility and feasibility of die sharing.
Innovation Solution
A hierarchical decoding method is employed, where each die is configured with address space information of its own functional modules and other dies, reducing configuration information and circuit area by determining access requests at the die level before routing, and using table lookup processes to obtain necessary identifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complete address space information of all functional modules in all dies is configured in each die for decoding, then decoding accuracy is improved, but configuration information quantity and circuit area increase
Solution Approach 1:
The address space information is segmented into two levels: die-level address space information (configured in each die) and module-level address space information (only in the master die). This segmentation allows each die to have only the information it needs for initial decoding, reducing configuration information quantity while maintaining decoding accuracy through hierarchical processing.
Solution Approach 2:
The master die acts as an intermediary that holds the complete address space information and performs final decoding. When a die cannot decode an address locally, it forwards the request to the master die, which has the complete mapping information. This intermediary approach maintains high decoding accuracy while distributing configuration information selectively.
2Measurement precision
If complete address space information of all functional modules in all dies is configured in each die for decoding, then decoding completeness is improved, but circuit area overhead increases
Solution Approach 1:
The decoding function is segmented into two stages: first-stage decoding performed by each die using its local address space information, and second-stage decoding performed by the master die using complete address space information. This segmentation reduces circuit area overhead in each die while ensuring decoding completeness through the master die's comprehensive information.
Solution Approach 2:
The complete address space information is extracted from each die and centralized in the master die. Each die retains only the essential die-level address space information needed for initial decoding. This extraction eliminates redundant configuration information from individual dies, reducing circuit area overhead while maintaining decoding completeness through the master die.
3Quantity of substance
If hierarchical decoding is implemented with die-level address space information only, then configuration information is reduced, but decoding complexity distribution changes
Solution Approach 1:
The decoding complexity is segmented into two levels: simple die-level decoding performed by each die using minimal configuration information, and complex module-level decoding performed by the master die using complete address space information. This segmentation reduces configuration information in each die while distributing decoding complexity appropriately across the system.
Data Source
AI summary
Embodiments of this application provide a decoding method, a first die, and a second die, and relate to the field of chip technologies, to reduce configuration information of the first die. A specific solution is: The first die determines, based on first address space information and first address information carried in a first access request, whether the first access request is used to access the first die (701). If the first die determines that the first access request is not used to access the first die, the first die performs decoding based on the first address information to obtain a die identity document of the second die, and sends a second access request to the second die for decoding by the second die to obtain a port identity document of a functional module, in the second die, to be accessed by using the first access request (702).


