Hierarchical Concatenated ECC for Fixed-Length RAU Decoding
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Solution Overview
Problem
Existing NAND chip structures in flash memory devices face a trade-off between maintaining fast reading speed and decoding time while achieving high reliability due to limitations on Error Correction Code (ECC) length imposed by the Random Access Unit (RAU) structure.
Innovation Solution
Implementing a hierarchical generalized concatenated code (H-GCC) that includes two hierarchies: a first hierarchy using a generalized concatenated code (GCC) to protect RAUs with fixed information and code length, and a second hierarchy adding global parity bits to enhance coding gain, allowing high throughput and fixed information length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If longer ECC codes are used to achieve better reliability, then reliability is improved, but the RAU structure limits the code length to a particular length
Solution Approach 1:
The patent segments the ECC code into two hierarchical levels: inner codes applied to individual RAUs and outer codes applied across multiple RAUs. This segmentation allows each level to operate within the fixed code length constraints of the RAU structure while collectively achieving the benefits of longer effective code length for improved reliability.
Solution Approach 2:
The patent implements a nested code structure where inner codes (e.g., Reed-Solomon codes) are embedded within outer codes (e.g., polar codes or LDPC codes). The inner codes protect individual RAUs with fixed length, while the outer codes provide additional protection across multiple RAUs, effectively creating a longer code structure that adapts to the RAU constraints.
2Speed
If local ECC is applied to each RAU to maintain fast reading speed and decoding time, then reading speed is improved, but reliability is limited compared to longer codes
Solution Approach 1:
The patent segments the error correction process into two stages: first, inner codes quickly decode individual RAUs to maintain fast reading speed; second, outer codes provide additional reliability checks across multiple RAUs. This segmentation allows the system to achieve both fast decoding and high reliability.
Solution Approach 2:
The inner codes perform preliminary error correction on each RAU before the outer code processing. This preliminary action quickly handles most errors at the RAU level, maintaining fast reading speed, while the outer codes provide additional reliability enhancement in a subsequent stage.
3Reliability
If hierarchical structure with two levels of GCC is implemented to achieve improved coding gain, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent divides the complex encoding task into two manageable segments: inner GCC encoding for individual RAUs and outer GCC encoding for multiple RAUs. This segmentation reduces the complexity of each individual encoding operation while achieving the cumulative benefit of improved coding gain and reliability.
Solution Approach 2:
The patent applies partial error correction at the inner code level (handling errors within individual RAUs) and partial error correction at the outer code level (handling errors across multiple RAUs). This partial action approach distributes the complexity across two simpler operations rather than requiring one extremely complex single-level code.
Data Source
AI summary
Systems, devices, and methods for encoding information bits for storage, including obtaining information bits; encoding the information bits using an inner code to obtain a plurality of inner code words; encoding the plurality of inner code words using an outer code to generate an outer code word; and storing the outer code word in a storage device, wherein at least one of the inner code and the outer code includes a generalized concatenated code (GCC), and wherein the outer code word includes a hierarchical-GCC (H-GCC) code word.