Electronic Device for Hierarchical Editing Synthesis and Synchronization
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Solution Overview
Problem
Existing electronic devices face challenges in efficiently processing collaborative editing instructions, particularly in identifying and synthesizing hierarchical document editing instructions across multiple devices in real-time collaborative editing scenarios.
Innovation Solution
An electronic device equipped with memory, communication circuits, and processors that execute computer-executable instructions to receive, identify, and synthesize hierarchical editing instructions, prioritizing synthetic instructions based on checkpoint values to ensure seamless document updates across devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If hierarchical editing instructions are transmitted and processed in real-time across multiple devices, then collaborative editing functionality is improved, but processing complexity and latency increase
Solution Approach 1:
The patent segments hierarchical editing instructions into individual operation elements that can be independently processed. Each instruction is broken down into discrete units that can be identified, prioritized, and executed separately, reducing the complexity of processing entire hierarchical structures at once while maintaining real-time collaborative editing capabilities
Solution Approach 2:
The patent implements preliminary prioritization of editing instructions based on checkpoint values before execution. Instructions are pre-ranked and organized in advance, allowing the system to process them in an optimized sequence without requiring complex real-time decision-making, thus reducing processing complexity while maintaining functionality
2Reliability
If multiple editing instructions are synthesized and prioritized, then document update synchronization is improved, but processing time increases
Solution Approach 1:
The patent changes the parameter of instruction prioritization by using checkpoint values to determine processing order. Instead of processing instructions in received order or using complex synchronization protocols, the system transforms the approach by prioritizing based on checkpoint parameters, which enables efficient synthesis and reduces processing time while maintaining synchronization reliability
3Speed
If hierarchical instructions are processed without synthesis, then processing speed is improved, but synchronization accuracy deteriorates
Solution Approach 1:
The patent implements self-service synthesis where the system automatically identifies and synthesizes instructions that should be combined based on their hierarchical relationships and checkpoint values. This automatic synthesis mechanism maintains synchronization accuracy without requiring manual intervention or complex external coordination, preserving processing speed while improving synchronization precision
Data Source
AI summary
An electronic device is provided. The electronic device includes memory storing one or more computer programs, a communication circuit, and at least one processor communicatively coupled to the memory and the communication circuit, wherein the one or more computer programs include computer-executable instructions that, when executed by the at least one processor individually or collectively, cause the electronic device to receive instructions for document creation generated based on an instruction having a hierarchical structure from an external electronic device through the communication circuit, identify synthesis information on the instructions, determine whether to synthesize the instruction with a previous instruction based on the synthesis information, and synthesize the instruction with the previous instructions based on the determination.