Hierarchical Linked Lists for Flexible Voltage Sequencing

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Solution Overview

Problem

Conventional voltage sequence controllers lack flexibility and are costly to modify when implementing voltage domains in large electronic systems, as they often require hard-coding and redesigning hardware circuits to accommodate changes in complex systems.

Innovation Solution

Implementing a finite state machine using hierarchical linked lists that allows for easy configuration and modification by storing state transitions and actions in memory, enabling flexible control of power supplies and voltage sequencing through a graphical user interface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional hard-coded voltage sequence controllers are used, then the control logic is fixed and reliable, but the system lacks flexibility and requires costly redesigns when changes are needed

Engineering Contradiction:

Improveflexibility of voltage sequencing controlVSAvoidcomplexity of modifying control logic

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent uses a state machine description language to create a software-based representation of the voltage sequencing control logic, which can be copied, modified, and reloaded without changing the underlying hardware circuitry. This allows flexible adaptation of control sequences while maintaining hardware stability.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The control logic transitions from a static hard-coded implementation to a dynamic software-based state machine that can be reconfigured at runtime. The hierarchical linked lists in memory allow the system to adapt its behavior dynamically based on different voltage domain requirements.

Inventive Principle:

Principle #15Dynamics

2Ease of manufacture

If hierarchical linked lists are used to implement the finite state machine, then the system gains configurability and ease of modification, but the memory structure and control logic become more complex

Engineering Contradiction:

Improveease of configuring voltage sequencingVSAvoidcomplexity of memory organization

Core Design Contradiction:

Ease of manufactureVSDevice complexity

Solution Approach 1:

The state machine is divided into hierarchical linked lists that segment the control logic into manageable units representing different voltage domains and sequencing stages. This segmentation allows independent configuration of each voltage domain while maintaining overall system coordination.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a state machine description language as an intermediary layer between the hardware and the control logic. This intermediary allows complex memory structures to be defined through high-level language constructs rather than direct hardware configuration, simplifying the design process.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Adaptability or versatility

If software-based state machines are used instead of hard-coded logic, then changes can be implemented without redesigning hardware, but the implementation requires more sophisticated memory structures

Engineering Contradiction:

Improveability to modify control logicVSAvoidcomplexity of data structure implementation

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The hierarchical linked list structure serves multiple functions: it represents the state machine transitions, stores the control logic, and enables runtime reconfiguration. This universal data structure replaces multiple specialized hardware components, reducing overall system complexity despite the sophisticated memory organization.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10310476B2Using linked-lists to create feature rich finite-state machines in integrated circuits

Publication Date: 2019.06.04 ANALOG DEVICES GLOBAL UNLTD

AI summary

An apparatus comprises an integrated circuit (IC) including sequencer circuitry; and a memory integral to or operatively coupled to the integrated circuit, wherein at least a portion of the memory is organized as a plurality of hierarchical linked lists defining a finite state machine of a plurality of finite IC states; wherein the sequencer circuitry is configured to: receive one or more control words from the hierarchical linked lists associated with an IC state; advance the IC to the IC state according to the one or more control words; and perform one or more actions corresponding to the IC state.