Hierarchical Memory Bank Timing for Higher Access Bandwidth
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Solution Overview
Problem
Existing memory devices face challenges in efficiently managing increasing input/output interface frequencies and bandwidths due to limitations in the timing constraints of successive memory bank accesses, leading to inefficiencies in data transfer operations.
Innovation Solution
The memory banks are organized into hierarchical groups and clusters, with specific time intervals defined for successive accesses between different bank groups and clusters, ensuring optimized data transfer by enforcing minimum time intervals between accesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory banks are accessed with shorter time intervals to increase data transfer speed, then bandwidth and interface frequency increase, but timing constraints and operational complexity worsen
Solution Approach 1:
The memory system is segmented into multiple bank groups (BG0-BG3) with hierarchical organization. Each bank group contains multiple memory banks that can be independently accessed. This segmentation allows the memory controller to manage timing constraints at different levels: intra-bank group accesses use one timing interval while inter-bank group accesses use another, thereby reducing overall timing management complexity while maintaining high bandwidth
Solution Approach 2:
The patent implements dynamic timing management where the time interval between successive accesses varies based on the target bank group. When accessing banks within the same bank group, a first time interval is used; when accessing banks in different bank groups, a second (shorter) time interval is used. This dynamic adjustment optimizes data transfer speed without violating timing constraints, effectively resolving the contradiction between bandwidth and timing complexity
2Speed
If successive accesses to different bank groups are allowed with minimum time intervals, then interface frequency increases, but timing precision requirements worsen
Solution Approach 1:
The system dynamically adjusts timing intervals based on access patterns. Successive accesses to different bank groups utilize a second time interval that is shorter than the first time interval used for intra-bank group accesses. This dynamic timing scheme enables higher access frequencies while maintaining precise timing control through hierarchical bank group management, resolving the contradiction between speed and timing precision
3Productivity
If more memory banks are organized in parallel to increase bandwidth, then data transfer efficiency improves, but timing coordination complexity worsens
Solution Approach 1:
Memory banks are segmented into bank groups with hierarchical organization (banks within groups, groups within arrays). This segmentation enables independent operation of each bank group while maintaining coordinated access across the entire memory system. The hierarchical structure reduces timing coordination complexity by allowing localized management within bank groups while enabling parallel operations across multiple groups, thereby improving data transfer efficiency without proportionally increasing coordination complexity
Solution Approach 2:
The system employs dynamic timing coordination where successive accesses to different bank groups are permitted with a second time interval that is shorter than the first time interval for same-group accesses. This dynamic timing scheme enables efficient parallel operation of multiple bank groups while maintaining precise timing coordination through the hierarchical structure, resolving the contradiction between productivity and coordination complexity
Data Source
AI summary
The memory banks of a memory device are arranged and operated in groups and the groups are further arranged and operated as clusters of these groups. Successive accesses to banks that are within different bank group clusters may be issued at a first time interval. Successive accesses to banks that are within different bank groups within the same cluster can be issued no faster than a second time interval. And, successive accesses to banks that are within the same bank group may be issued no faster than a third time interval. The memory banks of a memory device may have multiple rows open at the same time. The rows that can be open at the same time is determined by the rows that are already open. These memory banks are also arranged and operated in groups that have three different minimum time intervals.