Hierarchical Network Clock Control for Fine-Grained Power Savings
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Solution Overview
Problem
Existing methods for reducing power consumption in CNN processing hardware face inefficiencies due to time lag in clock stop and re-supply, leading to increased processing time and reduced power saving effectiveness when fine granularity clock control is desired.
Innovation Solution
An information processing apparatus with a control unit that manages operation clocks based on network information, allowing for fine-grained control of clock supply to transmission and reception units during data transfer operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a clock stop request signal is asserted and an acknowledge signal is returned before stopping the clock, then data transfer consistency is maintained, but processing time increases due to the multi-step procedure
Solution Approach 1:
The patent extracts the essential function of clock stopping from the complex multi-step procedure (request signal, acknowledge signal, clock stop) and implements it directly through clock control logic that monitors data transfer states. This eliminates the time-consuming handshake protocol while maintaining data consistency by directly controlling the clock based on actual transfer needs.
Solution Approach 2:
The clock control unit autonomously determines when to stop or resume the clock by monitoring data transfer states between storage and arithmetic units, without requiring external request or acknowledge signals. This self-service mechanism reduces processing time while ensuring data consistency through direct state monitoring.
2Use of energy by moving object
If the clock is stopped uniformly for all modules when data transfer is not possible, then power consumption is reduced, but other processing (such as next data transfer preparation) cannot proceed
Solution Approach 1:
The patent applies local quality by selectively controlling the clock for the data transfer interface module rather than uniformly stopping clocks for all modules. This allows the transfer interface to enter a low-power state when data transfer is not possible, while other modules continue processing operations such as preparing the next data transfer, thus maintaining overall system productivity.
Solution Approach 2:
The system segments clock control into module-specific control, where each module's clock is independently managed based on its operational state. This segmentation enables the data transfer interface to be powered down during idle periods while other modules remain active, achieving both power savings and continued processing capability.
3Use of energy by moving object
If the clock is re-supplied after being stopped, then power saving is achieved during idle periods, but a time lag occurs in the re-supply process
Solution Approach 1:
The clock control unit performs preliminary actions by monitoring data transfer states in advance and proactively controlling clock supply. When data transfer becomes possible again, the clock is immediately re-supplied without delay, as the control unit is already in a state to detect and respond to transfer readiness, eliminating time lag while maintaining power savings during idle periods.
4Use of energy by moving object
If clock control is performed with fine granularity in units of several small clock cycles, then power saving effectiveness increases, but the complexity of clock control increases
Solution Approach 1:
The clock control unit autonomously manages fine-grained clock control by directly monitoring data transfer states and controlling clock supply accordingly. This self-service approach enables fine-grained control in units of small clock cycles without requiring complex external control logic, as the system self-regulates based on actual transfer needs, achieving both power savings and manageable complexity.
Data Source
AI summary
An information processing apparatus comprises: an arithmetic unit configured to perform arithmetic operation processing using a hierarchical network; a storage unit configured to store input data inputted to the arithmetic unit and output data outputted from the arithmetic unit; a transmission unit configured to transmit to the arithmetic unit the input data stored in the storage unit; a reception unit configured to receive and store in the storage unit the output data from the arithmetic unit; and a control unit configured to, in a case where the input data cannot be transmitted from the storage unit to the arithmetic unit, control supply of an operation clock to the transmission unit based on network information that indicates a structure of the hierarchical network.