Hierarchical Power Controller Reset Coordination

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Solution Overview

Problem

In systems with multiple power domains managed by different power controllers, coordinating a reset procedure across these domains can lead to lack of coordination, resulting in long transitional system states and potential partial resets, which may cause data corruption.

Innovation Solution

A hierarchical arrangement of power controllers is implemented, where a master power controller at a higher level initiates a reset procedure by issuing a reset entry request to multiple power controllers, ensuring each associated power domain is prepared for the reset before asserting a synchronized reset signal across all components in the reset domain.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a reset procedure is performed in a distributed manner using multiple power controllers, then each power controller can independently reset its associated power domain, but this causes long transitional system states and potential partial resets

Engineering Contradiction:
ImproveIndependent reset capability of each power controllerVSAvoidSystem stability during reset
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

A master power controller is introduced as an intermediary to coordinate reset operations across multiple power controllers. The master controller receives reset requests, manages the reset state machine, and controls the timing of reset signals to ensure all power domains are properly prepared and synchronized, preventing partial resets and maintaining system stability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The master power controller performs preliminary actions by receiving and validating reset requests before actual reset execution. It manages the reset state machine to ensure all power domains are in the appropriate state before asserting reset signals, and coordinates the sequential preparation of power domains to avoid transitional instability

Inventive Principle:
Principle #10Preliminary action

2Productivity

If reset requests are processed independently by each power controller, then processing can occur in parallel, but this leads to lack of coordination and potential data corruption

Engineering Contradiction:
ImproveReset processing speedVSAvoidData corruption risk
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The master power controller acts as a central coordinator that receives reset requests and distributes coordinated reset commands to multiple power controllers. This ensures that all power domains are reset in a synchronized manner, preventing data corruption that would occur with uncoordinated independent reset operations

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent combines the reset control functions of multiple power controllers under a single master controller that manages the overall reset procedure. By merging the coordination function at the master level while maintaining individual power domain control, the system achieves both parallel processing capability and coordinated execution

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If a hierarchical arrangement with a master power controller is implemented, then reset coordination is improved, but system complexity increases

Engineering Contradiction:
ImproveReset coordinationVSAvoidPower controller hierarchy structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The power controller system is segmented into a master power controller and multiple slave power controllers with clearly defined roles. The master handles high-level coordination and state management, while slave controllers handle local power domain control, dividing the complex reset coordination task into manageable segments

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11513574B2System and method for controlling a reset procedure
Publication Date: 2022.11.29 ARM LTD
  • US11513574B2 patent drawing
  • US11513574B2 patent drawing
  • US11513574B2 patent drawing

AI summary

A system and method are provided for controlling a reset procedure. The system has a plurality of power domains, where each power domain comprises a plurality of components, and a plurality of power controllers, wherein each power controller has at last one associated power domain and is arranged to control a supply of power to each associated power domain. The plurality of power controllers are arranged in a hierarchical arrangement comprising two or more hierarchical levels. A given power controller at a given hierarchical level is arranged to implement a reset procedure requiring a reset to be performed in a given reset domain, where the given reset domain comprises at least a subset of the components provided in multiple power domains associated with multiple power controllers provided in at least one hierarchical level below the given hierarchical level. The given power controller is arranged to initiate a reset procedure by issuing a reset entry request for receipt by each of the multiple power controllers. Each power controller is arranged, on accepting the reset entry request, to perform a reset preparation procedure in respect of each associated power domain within the multiple power domains, and then to issue a response signal to confirm that the reset preparation procedure has been performed. In response to detecting that the response signal has been issued by each of the multiple power controllers, the given power controller asserts a reset signal to the multiple power domains providing components of the given reset domain in order to cause the reset to be performed in a synchronised manner in respect of all of the components in the given reset domain.