Hierarchical Prefetch Units Across Page Boundaries
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Solution Overview
Problem
In processors with multiple levels of caches, lower-level prefetch units stall at page boundaries due to lack of knowledge about the next virtual page's physical address, leading to increased latency and cache misses, as they cannot effectively prefetch data across page boundaries.
Innovation Solution
The implementation of a hierarchical cache system where upper-level prefetch units preemptively generate and convey the translation for the next virtual page to lower-level prefetch units before reaching a page boundary, allowing continuous prefetching without delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If lower-level prefetch units operate independently without upper-level assistance, then device complexity is reduced, but they stall at page boundaries due to lack of physical address knowledge
Solution Approach 1:
Upper-level prefetch units perform preliminary actions by preemptively generating and conveying physical address translations to lower-level prefetch units before the lower-level units reach page boundaries. This advance preparation ensures continuous prefetching without stalls, as the necessary translation information is already in place.
Solution Approach 2:
The upper-level prefetch units act as intermediaries between the virtual address space and the lower-level prefetch units. They receive virtual address translations from the TLB and convert them into physical address information that can be conveyed to lower-level units, enabling seamless cross-page boundary prefetching.
2Measurement precision
If lower-level prefetch units stall at page boundaries to obtain physical addresses, then translation accuracy is improved, but latency increases
Solution Approach 1:
The system performs address translation preliminarily by having upper-level prefetch units fetch and store physical address translations before the lower-level units need them. This eliminates the need for stalls at page boundaries, as the translation information is already prepared and conveyed in advance.
Solution Approach 2:
The prefetching operation maintains continuity by ensuring that physical address translations are always available when needed. The upper-level units continuously convey translation information to lower-level units, preventing interruptions in the prefetching stream and eliminating idle stall periods.
3Reliability
If prefetch units are more aggressive closer to the core, then cache hit rate is improved, but coordination across page boundaries becomes more difficult
Solution Approach 1:
The prefetch hierarchy is segmented into multiple levels (upper-level and lower-level prefetch units) with distinct responsibilities. Upper-level units handle virtual-to-physical address translation, while lower-level units handle aggressive prefetching. This segmentation allows each level to optimize its function independently, maintaining high cache hit rates while managing coordination complexity.
Solution Approach 2:
Upper-level prefetch units serve as intermediaries that bridge the gap between virtual address processing and aggressive physical prefetching. They receive translation information from the TLB and relay it to lower-level units, enabling the lower-level units to operate aggressively without directly managing the complex translation coordination.
Data Source
AI summary
Processors and methods for preventing lower level prefetch units from stalling at page boundaries. An upper level prefetch unit closest to the processor core issues a preemptive request for a translation of the next page in a given prefetch stream. The upper level prefetch unit sends the translation to the lower level prefetch units prior to the lower level prefetch units reaching the end of the current page for the given prefetch stream. When the lower level prefetch units reach the boundary of the current page, instead of stopping, these prefetch units can continue to prefetch by jumping to the next physical page number provided in the translation.