Hierarchical Routing Circuitry for SIMD Operand Permutation
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Solution Overview
Problem
Existing SIMD architectures face challenges in efficiently routing operands among threads due to the high area and power consumption required for full permutation support, especially in larger SIMD group sizes.
Innovation Solution
The implementation of hierarchical routing circuitry that supports full permutation within subsets of inputs and uses a selection level to route operands, reducing the need for extensive crossbar areas and power consumption by performing multiple permutation operations across multiple levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If full permutation routing is implemented among all SIMD threads, then operand sharing capability is improved, but area consumption and power consumption increase significantly
Solution Approach 1:
The routing circuitry is divided into multiple levels, with each level handling a subset of threads. Instead of implementing a single large N×N crossbar for all N threads, the system uses multiple smaller crossbars (e.g., four 4×4 crossbars for 16 threads) organized in a hierarchical structure. Each crossbar handles permutation for a specific subset of threads, reducing the area required per crossbar while collectively providing full permutation capability across all threads through multiple permutation stages.
2Adaptability or versatility
If full permutation routing is implemented among all SIMD threads, then operand sharing capability is improved, but power consumption increases significantly
Solution Approach 1:
By segmenting the routing function across multiple levels and smaller crossbars, the total power consumption is reduced compared to a single large crossbar. Each smaller crossbar consumes less power, and the hierarchical structure allows for more efficient routing paths.
Solution Approach 2:
The system performs multiple permutation operations across multiple levels rather than attempting to achieve full permutation in a single stage. This multi-stage approach allows for more efficient power usage by breaking down the complex permutation task into simpler, more power-efficient sub-tasks at each level.
3Area of stationary object
If hierarchical routing with multiple levels is used, then area and power consumption are reduced, but routing complexity increases
Solution Approach 1:
While segmentation into multiple levels does increase structural complexity, it reduces the complexity of individual crossbar units. Each small crossbar has simpler control logic and fewer routing decisions to make compared to a single large crossbar, distributing the complexity across multiple manageable units.
Solution Approach 2:
The multi-level hierarchical structure performs more routing steps than a single-stage system, but each individual routing step is simpler. The control logic for each small crossbar is more straightforward, and the overall system achieves full permutation capability through the composition of these simpler partial permutation operations.
Data Source
AI summary
Techniques are disclosed relating to routing circuitry configured to perform permute operations for operands of threads in a single-instruction multiple-data group. In some embodiments, an apparatus includes hierarchical operand routing circuitry configured to route operands between a set of single-instruction multiple-data (SIMD) pipelines based on a permute instruction. In some embodiments, the routing circuitry includes a first level and a second level. The first level may include a set of multiple crossbar circuits each configured to receive operands from a respective subset of the pipelines and output one or more of the received operands on multiple output lines based on the permute instruction, where the crossbar circuits support full permutation within a respective subset. A second level may be configured to select an operand from a previous level for each of the pipelines, and may select from among only a portion of output operands from the previous level to provide an operand for a respective pipeline.