Hierarchical Shift Register Control for High-Resolution Pixel Matrix
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Solution Overview
Problem
Conventional pixel driving methods in high-resolution TFT displays, especially those required for holographic displays, face limitations in controlling high-frequency row and column lines due to increased power loss and heat generation, making it difficult to achieve high refresh rates and resolutions above 100 million pixels.
Innovation Solution
The implementation of a device with a pixel matrix divided into clusters, each controlled by a global shift register that distributes control data through a hierarchical structure of shift registers, reducing the need for long continuous lines and minimizing power loss by providing clocks at multiple points within the display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of pixels and refresh rate are increased to achieve high-resolution holographic displays, then the display quality and information capacity are improved, but the power loss and heat generation increase significantly
Solution Approach 1:
The pixel matrix is divided into multiple clusters, each controlled by its own shift register. This segmentation reduces the length of control lines and the total capacitance that must be recharged, thereby reducing power loss while maintaining high resolution. Each cluster operates independently, allowing the system to achieve high refresh rates without proportionally increasing power consumption.
2Productivity
If the refresh rate and pixel count are increased, then the display capability for holographic reconstructions is improved, but the control frequency and switching speed requirements become unmanageably high
Solution Approach 1:
By dividing the display into clusters with dedicated shift registers, the control frequency for each cluster can be reduced while maintaining the overall refresh rate. The segmentation allows parallel control of multiple pixel groups, effectively reducing the per-cluster switching speed requirement.
Solution Approach 2:
The patent introduces a hierarchical control structure with multiple shift register stages, adding a temporal dimension to the control process. This allows the system to maintain high refresh rates by staggering the control cycles across different dimensions of the pixel matrix.
3Device complexity
If conventional row and column line control is used, then the display structure is simple, but the cable length and driver complexity increase significantly for high-resolution displays
Solution Approach 1:
The display is segmented into clusters, each with its own shift register and control lines. This reduces the effective cable length for each cluster while maintaining the overall display size. The segmentation allows for shorter, more manageable connection lines within each cluster.
Solution Approach 2:
The control structure transitions from a two-dimensional row-column addressing scheme to a hierarchical multi-stage shift register system. This dimensional change in the control architecture reduces the physical cable length requirements by enabling localized control within clusters.
4Measurement precision
If the number of shift register stages is increased to control more pixels, then the pixel count and resolution are improved, but the device complexity and space requirements increase
Solution Approach 1:
The shift register structure is segmented into multiple stages, each controlling a specific cluster of pixels. This segmentation allows the system to scale pixel count by adding parallel clusters rather than extending a single long shift register, reducing the complexity increase per stage.
Solution Approach 2:
The shift register stages are nested within the cluster structure, with each stage controlling a subset of pixels. This nested arrangement allows efficient use of space and reduces the overall device complexity by organizing the control logic in a hierarchical manner.
Data Source
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AI summary
In a pixel matrix subdivided into clusters, the clusters are connected to a control circuit outside the pixel matrix (2) by way of a point-to-point connection (18). Each cluster is an active matrix structure made of row and column lines and pixel TFTs. Chains of analog (14) and digital (16) shift registers are provided for the local row and column lines. Further, clusters can be used that have a hierarchical set-up in which N local shift registers branch off of global shift registers (18). Data values are conveyed within the local shift register at a lower cycle time than the global shift register until the data values arrive at the outputs of the shift register for controlling the pixels. This control mechanism can be integrated into the pixel matrix of a display and avoids non-transparent areas.