Hierarchical Timestamping for Network Latency Analysis

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Solution Overview

Problem

Current network latency analysis tools are limited in their ability to provide comprehensive understanding of latency within and between network elements, often requiring costly secondary timing networks for detailed analysis and focusing on subsets of the network rather than production data.

Innovation Solution

Implementing a hierarchical time stamping system across network elements, where each node appends a time stamp to network data, allowing for node-to-node latency determination and path tracing within production traffic without introducing additional latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If hierarchical time stamping is implemented on production network data, then measurement precision and analysis accuracy improve, but device complexity increases due to additional timing modules and processing requirements

Engineering Contradiction:
Improvelatency measurement accuracyVSAvoidnetwork element complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The timing module is integrated into the existing network element infrastructure, allowing it to serve multiple functions: timestamping production data, tracking latency, and supporting analysis without requiring separate dedicated timing hardware. This multi-functionality approach improves measurement precision while minimizing the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The timestamp data structure is designed to nest hierarchical information within existing network data packets. Each timestamp contains nested references to previous timestamps and network element identifiers, allowing comprehensive latency tracking to be embedded within the standard data flow without adding external overhead structures.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Loss of information

If time stamps are appended to each unit of production network data, then information about network path and latency is preserved, but loss of time occurs due to processing overhead at each network element

Engineering Contradiction:
Improvenetwork path informationVSAvoidprocessing time
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The timestamping mechanism is pre-configured and integrated into the data plane of network elements, allowing timestamps to be appended automatically as data passes through without requiring real-time processing decisions. This preliminary preparation minimizes the time loss while ensuring complete path information is captured.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces manual or software-based timestamping processes with hardware-level timing mechanisms integrated into the network element's data plane. This substitution reduces processing overhead and time loss while maintaining complete path and latency information.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If hierarchical time stamping is implemented across all network elements, then productivity of network analysis improves, but device complexity increases due to control plane processing requirements

Engineering Contradiction:
Improvenetwork analysis efficiencyVSAvoidcontrol plane complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The network analysis function is segmented between data plane operations (timestamping) and control plane operations (analysis). Each network element independently performs timestamping in the data plane, while the control plane receives aggregated timestamp data for analysis. This segmentation improves overall network analysis productivity while distributing control plane complexity across multiple elements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control plane processes timestamp data selectively based on analysis needs, focusing computational resources on critical latency issues and key network paths rather than uniformly processing all timestamp data. This partial action approach improves productivity while reducing the burden on control plane resources.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11233720B2Hierarchical time stamping
Publication Date: 2022.01.25 ARISTA NETWORKS INC
  • US11233720B2 patent drawing
  • US11233720B2 patent drawing
  • US11233720B2 patent drawing

AI summary

Various embodiments are described herein, which provide a network element comprising a network port to receive production network data that is used for purposes other than testing the performance of a network, a data plane coupled to the network port, the data plane including a timing module to append a time stamp to a set of one or more time stamps included within the production network data, and a control plane coupled to the data plane, the control plane including a latency analyzer to analyze the set of one or more time stamps included within the production network data.