High-Affinity Snoop Filter Set Mapping for Lower-Power Coherency
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Solution Overview
Problem
Conventional multi-processor systems face challenges in maintaining data coherency across multiple caches, with snooping operations becoming increasingly power-consuming as processor architectures scale in size and complexity.
Innovation Solution
Implementing a snoop filter with a one-to-many or many-to-many correspondence between cache sets and snoop filter sets, allowing for a smaller number of ways per set while maintaining high associativity, thus improving power efficiency and reducing the impact of snooping operations on system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional snoop filter architecture with one-to-one correspondence between cache sets and snoop filter sets is used, then data coherency can be maintained, but power consumption increases and device complexity increases as processor architectures scale
Solution Approach 1:
The patent segments the snoop filter into multiple sets (first snoop filter set, second snoop filter set, etc.), each handling different portions of cache sets. This segmentation allows the snoop filter to manage large numbers of cache sets more efficiently, reducing power consumption while maintaining coherency through distributed lookup operations across multiple segmented structures.
Solution Approach 2:
The patent introduces a new organizational dimension by mapping cache sets to snoop filter sets through a many-to-many correspondence relationship rather than traditional one-to-one mapping. This dimensional change in the mapping architecture enables more efficient space utilization and reduces the number of active snoop filter entries needed, thereby lowering power consumption while preserving coherency tracking capability.
2Reliability
If conventional snoop filter architecture with one-to-one correspondence between cache sets and snoop filter sets is used, then data coherency can be maintained, but device complexity increases as processor architectures scale
Solution Approach 1:
The patent divides the snoop filter into multiple segmented sets that can independently manage different cache set ranges. This segmentation simplifies the overall structure by breaking down complex many-to-many mapping relationships into manageable segments, reducing the complexity of tracking and managing coherency states across large processor architectures.
Solution Approach 2:
The patent creates a universal mapping mechanism where multiple cache sets can map to multiple snoop filter sets through many-to-many correspondence. This multi-functional mapping approach simplifies the architecture by using a single unified structure that handles diverse mapping requirements, eliminating the need for separate specialized structures for different mapping scenarios.
3Reliability
If snoop filter has high associativity to maintain data coherency, then coherency management is effective, but power consumption increases
Solution Approach 1:
The patent segments the snoop filter into multiple sets that can handle coherency tracking in parallel. This segmentation allows the system to maintain high associativity for effective coherency management while reducing power consumption by distributing the lookup and tracking operations across multiple segmented structures rather than requiring a single large high-associativity structure.
Data Source
AI summary
Techniques and mechanisms for efficiently providing access to cached data. In an embodiment, a cache coherency engine comprises circuitry to provide a snoop filter which stores entries each corresponding to a respective line of one or more caches. The one or more caches comprise a first cache which includes a first set, and the snoop filter includes a first plurality of sets which are each configured to be available to represent a line of the first set. In another embodiment, the one or more caches comprise multiple caches which each comprise a respective first set, wherein, for each set of the first plurality of sets, any line in the multiple caches which is to be represented by that each set is to be a line in the respective first sets of the multiple caches.