High Aspect Ratio Capacitor Etching Process
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Solution Overview
Problem
Existing semiconductor etching processes face challenges in achieving near-vertical profiles for high aspect ratio structures, particularly in forming capacitor structures, as they are fragile and prone to collapse due to surface tension during rinsing, leading to issues with critical dimension control and capacitance in sub-micron geometries.
Innovation Solution
A process involving a combination of wet and non-wet etching techniques, where a first recess is formed with a tapered profile, followed by profile straightening and the deposition of a conductive structure, and then exposed using a non-wet second etch that avoids surface tension damage, allowing for the formation of stable, near-vertical walls.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If wet etching is used to expose the conductive structure, then etching speed is improved, but the high aspect ratio structures collapse due to surface tension during rinsing
Solution Approach 1:
A sacrificial dielectric layer is introduced as an intermediary protective element between the etchant and the high aspect ratio conductive structure. This sacrificial layer absorbs the surface tension impact during rinsing, preventing collapse of the fragile conductive structure while allowing wet etching to proceed at high speed to expose the conductive structure.
Solution Approach 2:
The sacrificial dielectric layer is deposited beforehand to cover and protect the high aspect ratio conductive structure before the wet etching and rinsing processes. This preliminary protective action ensures the structure's integrity is maintained during subsequent processing steps that would otherwise cause collapse.
2Ease of manufacture
If conventional etching processes are used to form high aspect ratio openings, then manufacturing simplicity is maintained, but near-vertical profiles cannot be achieved
Solution Approach 1:
The etching parameters are changed by introducing a profile straightening etch step with controlled selectivity and depth. This additional etching parameter adjustment transforms the tapered profile into a near-vertical profile, achieving manufacturing precision requirements while maintaining overall process simplicity through a standardized multi-step etching sequence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of stable, near-vertical profiles in high aspect ratio structures, enhancing capacitance and preventing structural collapse, thus improving the reliability and performance of semiconductor devices.
Implementation Method 1
a first etch is carried out to expose a first portion of the conductive structure. The first etch is followed up by a first rinsing process. Thereafter, a non-wet second etching process is carried out
Implementation Method 2
a non-wet second etching process is carried out to expose a second portion of the conductive structure
Data Source
AI summary
An etching process includes providing a dielectric first film on a substrate and a sacrificial second film on the dielectric first film. A conductive structure such as a container capacitor is formed in a recess in the first and second films. The conductive structure is exposed as to its external surface by an etch process that resists destructive collapse of the conductive structure.