High Bandwidth Write Command for Cache Coherency
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Solution Overview
Problem
In multi-core processor systems, conventional cache coherence protocols are inefficient due to the high number of messages required for maintaining cache coherency, leading to delays and increased energy consumption, particularly when components like network interface controllers send large data and expect preserved order of requests.
Innovation Solution
Implementing a high bandwidth write command method that involves sending a write request to a record-keeping structure, determining copies of the data in a distributed cache system, sending invalidation requests, notifying the requester of data presence, and sending a write response only after all acknowledgments are received, thereby reducing the number of messages and preserving the order of requests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional directory-based cache coherence protocols are used, then cache coherency is maintained, but the number of messages increases causing delays and increased energy consumption
Solution Approach 1:
The patent applies preliminary action by having the requesting core send a request for ownership (RFO) to the tag directory before actually performing the write operation. This preliminary query allows the system to determine in advance which cores hold copies of the cache line, enabling the requesting core to send targeted invalidation requests only to those specific cores rather than broadcasting to all cores, thereby reducing the total number of messages and energy consumption while maintaining cache coherency.
2Reliability
If conventional directory-based cache coherence protocols are used, then cache coherency is maintained, but the number of messages increases causing delays
Solution Approach 1:
The patent reduces delay by performing the RFO query to the tag directory before the write operation, so that the list of cores holding cache line copies is determined in advance. This allows the invalidation requests to be sent concurrently to multiple cores rather than sequentially, reducing the total time required for the coherence maintenance process.
Solution Approach 2:
The patent maintains continuity of useful action by allowing the requesting core to proceed with the write operation after receiving the RFO response, without waiting for all invalidation requests to complete. The invalidation requests are sent in parallel to multiple cores, and the requesting core can continue processing other operations while waiting for invalidation acknowledgments, thereby reducing overall delay.
3Reliability
If network interface controllers send large data with preserved request order, then data integrity is maintained, but the number of messages increases
Solution Approach 1:
The patent merges multiple operations into a single atomic write operation. Instead of sending multiple separate messages for data transfer and coherence maintenance, the requesting core combines the write operation with targeted invalidation requests in a single coordinated sequence. The RFO is followed by sending invalidation requests to all identified cores, and only after receiving all acknowledgments does the requesting core complete the write. This merging reduces the total number of messages while maintaining data integrity and request order.
Data Source
AI summary
A micro-architecture may provide a hardware and software of a high bandwidth write command. The micro-architecture may invoke a method to perform the high bandwidth write command. The method may comprise sending a write request from a requester to a record keeping structure. The write request may have a memory address of a memory that stores requested data. The method may further determine copies of the requested data being present in a distributed cache system outside the memory, sending invalidation requests to elements holding copies of the requested data in the distributed cache system, sending a notification to the requester to inform presence of copies of the requested data and sending a write response message after a latest value of the requested data and all invalidation acknowledgements have been received.