High-Baud Receiver AFE with T-Coils and Class-AB Sampling Buffers

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Solution Overview

Problem

High baud-rate receivers face challenges in implementing high bandwidth, high performance Analog-Front-Ends (AFEs) due to increasing parasitic capacitance, resistance overheads, and 1/f noise in advanced process nodes, which complicates power dissipation and integration in a compact form factor.

Innovation Solution

The proposed solution involves a high-bandwidth AFE device with an input matching network, a buffer device, and a sampler array, utilizing T-coils, class-AB source followers, and programmable attenuation circuits to optimize signal processing and power efficiency, achieving over 40 GHz bandwidth and 100 GS/s sampling rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high bandwidth, high performance AFEs are implemented in advanced process nodes, then signal processing performance is improved, but parasitic capacitance and resistance overheads increase

Engineering Contradiction:

Improvesignal processing performanceVSAvoidparasitic capacitance and resistance

Core Design Contradiction:

Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The AFE is divided into multiple functional blocks including input matching network, buffer device, sampler array, and programmable attenuation circuits. Each block is optimized independently to minimize parasitic effects while maintaining overall high bandwidth performance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different circuit blocks use different design optimizations tailored to their specific functions. For example, the input matching network uses specific topologies to minimize input-referred noise, while buffer devices use class-AB operation to reduce power consumption and parasitic effects in their respective regions.

Inventive Principle:

Principle #3Local quality

2Speed

If high bandwidth AFEs are implemented, then bandwidth is improved, but power dissipation increases

Engineering Contradiction:

ImprovebandwidthVSAvoidpower dissipation

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The AFE employs dynamically adjustable components including programmable attenuation circuits and variable gain stages. These allow the system to optimize power consumption based on signal conditions while maintaining high bandwidth capability when needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The circuit parameters such as bias currents, attenuation levels, and gain settings can be dynamically changed to optimize the trade-off between bandwidth and power dissipation. The class-AB buffer operation allows efficient power usage while maintaining high-speed performance.

Inventive Principle:

Principle #35Parameter changes

3Productivity

If high sampling rate ADCs are used, then sampling rate is improved, but device complexity increases

Engineering Contradiction:

Improvesampling rateVSAvoiddevice complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The AFE performs preliminary signal conditioning, filtering, and attenuation before the signal reaches the high-speed ADC. This preprocessing reduces the complexity requirements of the ADC by presenting a more optimized input signal that requires less complex digital processing.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The sampler array acts as an intermediary between the buffer device and the ADC, providing a structured interface that simplifies the connection to high-speed converters. The programmable attenuation circuits also serve as intermediaries to optimize signal levels for the ADC input.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Area of stationary object

If compact form factor is used, then integration is improved, but power envelope limits are exceeded

Engineering Contradiction:

Improveform factorVSAvoidpower envelope

Core Design Contradiction:

Area of stationary objectVSUse of energy by stationary object

Solution Approach 1:

Multiple functional blocks are merged into a highly integrated AFE device. The input matching network, buffer, sampler array, and programmable attenuation circuits are combined in a single compact package, optimizing space utilization while managing power through efficient circuit design.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The AFE is designed as a multi-functional device that can operate in different modes and configurations. The programmable attenuation and variable gain capabilities allow the same hardware to serve multiple functions, reducing the need for additional separate components that would increase both area and power consumption.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS11750166B2Method and device for high bandwidth receiver for high baud-rate communications

Publication Date: 2023.09.05 MARVELL ASIA PTE LTD

AI summary

An analog front-end (AFE) device and method for a high baud-rate receiver. The device can include an input matching network coupled to a first buffer device, which is coupled to a sampler array. The input matching network can include a first T-coil configured to receive a first input and a second T-coil configured to receive a second input. The first buffer device can include one or more buffers each having a bias circuit coupled to a first class-AB source follower and a second class-AB source follower. The sampling array can include a plurality of sampler devices configured to receive a multi-phase clocking signal. Additional optimization techniques can be used, such as having a multi-tiered sampler array and having the first buffer device configured with separate buffers for odd and even sampling phases. Benefits of this AFE configuration can include increased bandwidth, sampling rate, and power efficiency.