High-Current Step Generator With Fast Rise Time and Low Overshoot
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Solution Overview
Problem
Existing signal generators struggle to produce high-power step functions with short rise times and minimal overshoot, making it difficult to effectively test the bandwidth and frequency response of high-power circuits and sensors, which often result in longer measurement times or incomplete characterization due to insufficient current sensitivity.
Innovation Solution
A method and apparatus that sum currents at different rise times to generate a step function with a rise time of 2.5 ns or less, utilizing a capacitor bank with diverse capacitors and a high-power MOSFET switch, along with a passive filter to mitigate overshoot and noise, allowing for adjustable current levels and waveforms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a high-power source is switched without appropriate signal conditioning, then high current can be delivered, but the rise time becomes too slow and overshoot occurs
Solution Approach 1:
The patent segments the current generation into multiple parallel paths, each containing a capacitor and switch combination. These segmented current paths are summed to create the final high-current step function output, allowing independent optimization of each segment's rise time characteristics
Solution Approach 2:
The patent merges multiple current signals with different rise times through a summing junction to produce the final high-current step function. By combining currents from parallel capacitor-switch branches, the system achieves both fast rise time and high current capability
2Speed
If multiple currents at different rise times are summed, then a fast rise time step function can be generated, but the device complexity increases
Solution Approach 1:
The circuit is segmented into modular parallel branches, each containing a capacitor and switch. This segmentation allows the complex function of generating fast rise-time high-current step functions to be distributed across simpler, identical modular units
Solution Approach 2:
The patent varies the capacitance values and switching characteristics across different parallel branches to create currents with different rise times. By changing these parameters systematically, the system optimizes the summed output rise time without requiring complex control logic
3Speed
If a capacitor bank with diverse capacitors is used to sum currents, then fast rise time is achieved, but the manufacturing complexity increases
Solution Approach 1:
The patent employs capacitors with systematically varied parameters (different capacitance values) across parallel branches. This parameter variation is designed to create complementary rise time characteristics that, when summed, produce the desired fast overall rise time while maintaining manufacturability through standardized component selection
4Measurement precision
If high current is delivered quickly, then bandwidth characterization is improved, but overshoot and settling time increase
Solution Approach 1:
The patent anticipates and counteracts the harmful effects of overshoot and slow settling by carefully selecting capacitor values and switching characteristics before the signal is generated. The parallel branch configurations are pre-designed to produce currents whose summation naturally suppresses overshoot and accelerates settling
Solution Approach 2:
By adjusting capacitance values and switching parameters across the parallel branches, the system optimizes the trade-off between rise time speed and settling behavior. Specific parameter combinations are chosen to minimize overshoot while maintaining fast rise time for accurate bandwidth measurement
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the generation of high-current step functions with fast rise times, achieving a wide bandwidth for frequency domain analysis and stable step responses, facilitating efficient characterization of high-power circuits and sensors by minimizing rise time and overshoot.
Implementation Method 1
a capacitor bank with diverse capacitors and a high-power MOSFET switch
Implementation Method 2
high-power MOSFET switch
Data Source
AI summary
Method and apparatus to produce a step function with a designed transition (rise and/or fall) time on the order of <10 ns that reaches steady state by implementing a system that sums a number of currents at different rise times (frequencies) to generate the step function. The system also includes a passive output filter, composed of low resistance, inductance and very low capacitance to mitigate overshoot and high frequency noise.