High-Density Digitizer for High-Speed Imaging Signal Integrity
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Solution Overview
Problem
Conventional high-speed imaging systems using time delay integration (TDI) sensors face challenges due to noise and loading introduced by long traces in analog front end (AFE) and analog-to-digital converter (ADC) configurations, leading to reduced signal-to-noise ratio (SNR) and increased complexity and cost.
Innovation Solution
A high-density digitizer (HDD) module with integrated analog front end (AFE) and analog-to-digital converter (ADC) is developed, featuring a programmable gain amplifier, correlated double sampling circuit, and low voltage differential signaling, which processes multiple analog outputs in parallel to achieve high data rates while maintaining high SNR, and includes a control block for calibration and self-test modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If long traces are used to connect TDI sensors to pre-amplifiers and ADC devices, then the system can be configured conventionally, but noise and loading are introduced that reduce system performance
Solution Approach 1:
The patent merges the TDI sensor array, pre-amplifiers, and ADC devices into a single integrated circuit. This integration eliminates the need for long external traces, thereby reducing noise and loading effects while maintaining conventional configurability. The merged structure allows direct connection between sensor pixels and processing circuits without external trace paths.
2Productivity
If signal level is obtained by subtracting two consecutive samples in digital domain, then the ADC can operate at standard sampling rate, but this results in twice the sampling rate requirement and more thermal and quantization noise
Solution Approach 1:
The patent performs signal subtraction in the analog domain before ADC conversion, rather than in the digital domain after conversion. This preliminary action eliminates the need for the ADC to operate at twice the sampling rate, reducing thermal and quantization noise while maintaining the same effective sampling rate for the final digital output.
3Speed
If high channel count is used to read out sets of pixels in parallel, then high-speed imaging is achieved, but board complexity and expense increase
Solution Approach 1:
The patent integrates multiple channels of pixel readout, pre-amplification, and ADC conversion into a single integrated circuit. This merging reduces board complexity by eliminating the need for separate discrete components and extensive interconnect traces, while maintaining high channel count capability for parallel pixel readout and high-speed imaging.
4Device complexity
If integrated circuit is used for high-density digitizer, then compact size and reduced complexity are achieved, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the integrated circuit into distinct functional blocks: TDI sensor arrays, pre-amplifier circuits, ADC devices, and control logic. This segmentation allows each block to be optimized and tested independently, reducing the overall manufacturing precision requirements while achieving compact integration and reduced system complexity.
Data Source
AI summary
A module for high speed image processing includes an image sensor for generating a plurality of analog outputs representing an image and a plurality of HDDs for concurrently processing the plurality of analog outputs. Each HDD is an integrated circuit configured to process in parallel a predetermined set of the analog outputs. Each channel of the HDD can include an AFE for conditioning a signal representing one sensor analog output, an ADC for converting a conditioned signal into a digital signal, and a data formatting block for calibrations and formatting the digital signal for transport to an off-chip device. The HDDs and drive electronics are combined with the image sensor into one package to optimize signal integrity and high dynamic range, and to achieve high data rates through use of synchronized HDD channels. Combining multiple modules results in a highly scalable imaging subsystem optimized for inspection and metrology applications.