High Density Multi-Chip LED Devices with Segmented Electrical Topology

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Multi-chip LED devices face challenges in balancing current density and forward voltage distribution, leading to inefficiencies in light output and color rendering index due to differences in chip sizes and heat management in parallel arrangements.

Innovation Solution

The design incorporates interconnected LED chips with an optical element and a submount that minimizes light absorption, allowing for close chip placement and efficient wire bonding, with the optical element maintaining clearance from chip edges to optimize light emission and efficiency, and using ceramic or aluminum nitride submounts for improved thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If LED chips are placed close together to increase density, then the device footprint is reduced, but current density imbalance and forward voltage distribution issues worsen

Engineering Contradiction:

Improvedevice footprintVSAvoidcurrent density balance

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

The patent divides the LED chip array into multiple groups with different connection configurations (parallel and series combinations). This segmentation allows different chip groups to have different electrical characteristics, compensating for forward voltage variations and maintaining current density balance even when chips are densely packed.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies different connection topologies to different spatial regions of the LED array. By locally optimizing the electrical connections based on position and chip characteristics, the system maintains current balance across the entire dense array while minimizing overall footprint.

Inventive Principle:

Principle #3Local quality

2Illumination intensity

If LED chips are arranged in parallel to increase light output, then luminous flux is improved, but current draw becomes unbalanced due to forward voltage variations

Engineering Contradiction:

Improveluminous fluxVSAvoidcurrent draw balance

Core Design Contradiction:

Illumination intensityVSReliability

Solution Approach 1:

The patent segments the parallel LED chip arrangement into multiple sub-groups with different connection configurations. Some groups are connected in parallel while others use series combinations, creating a hybrid topology that distributes current more evenly across all chips while maintaining high overall luminous flux output.

Inventive Principle:

Principle #1Segmentation

3Volume of moving object

If wire bonds are placed inside the chip group for compactness, then device density is improved, but light absorption by wire bonds increases

Engineering Contradiction:

Improvedevice densityVSAvoidlight absorption

Core Design Contradiction:

Volume of moving objectVSLoss of energy

Solution Approach 1:

The patent relocates wire bonds from the planar interior of the chip group to the peripheral boundary region. This dimensional repositioning maintains electrical connectivity while removing the wire bonds from light propagation paths, thereby reducing parasitic light absorption without significantly increasing device footprint.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

4Volume of moving object

If optical element diameter is reduced to increase chip density, then device compactness is improved, but clearance for heat dissipation and light emission is reduced

Engineering Contradiction:

Improveoptical element sizeVSAvoidheat dissipation clearance

Core Design Contradiction:

Volume of moving objectVSTemperature

Solution Approach 1:

The patent transitions from a traditional centered optical element layout to a peripheral optical element configuration. This spatial repositioning creates annular clearance zones around the optical element that facilitate heat dissipation from densely packed chips while maintaining a compact overall device diameter.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration achieves high light output and efficacy (efficiency in lumens/Watt) with a high color rendering index, enabling compact, high-density LED devices suitable for small fixtures like halogen MR16 bulbs, with efficiencies up to 150 lm/W for cool white colors.

Implementation Method 1

an optical element disposed to affect light from the LED chips

Methodology Applied

Scientific EffectLight refraction and focusing: Refraction

Implementation Method 2

using ceramic or aluminum nitride submounts for improved thermal management

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9041042B2High density multi-chip LED devices

Publication Date: 2015.05.26 CREELED INC

AI summary

High density multi-chip LED devices are described. Embodiments of the present invention provide high-density, multi-chip LED devices with relatively high efficiency and light output in a compact size. An LED device includes a plurality of interconnected LED chips and an optical element such as a lens. The LED chips may be arranged in two groups, wherein the LED chips within each group are connected in parallel and the groups are connected in series. In some embodiments, the LED device includes a submount, which may be made of ceramic. The submount may include a connection bus and semicircular areas to which chips are bonded. Wire bonds can be connected to the LED chips so that all the wire bonds are disposed on the outside of a group of LED chips to minimize light absorption.