High-Frame-Rate Display Circuit and Controller for LSB Accuracy
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Solution Overview
Problem
High frame rates in digital displays, such as Near Eye Displays, lead to distortion in light output due to micromirror settling time, particularly affecting the least significant bit-plane, which limits color depth and accuracy.
Innovation Solution
The process involves isolating the time for the least significant bit-plane from preceding and succeeding bit-planes and reducing the light output of the light source during these bit-planes, ensuring accurate and reliable light output by extending the illumination time and using a lower illumination level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high frame rates are used in NEDs to avoid eye stress, then the display refreshes faster and eye stress is reduced, but the time for displaying each color within a frame is shortened causing micromirror settling time distortion and limiting color depth
Solution Approach 1:
The patent segments the bit-planes into different groups (first group for MSBs, second group for LSBs) with different illumination strategies. This segmentation allows the system to handle the settling time issue differently for different bit-significances, preserving color depth accuracy while maintaining high frame rates.
Solution Approach 2:
The patent applies preliminary action by ensuring that the spatial light modulator has sufficient time to settle before illuminating for the least significant bit-planes. The illumination is stopped during settling periods and resumed after settling, preemptively preventing distortion before it occurs.
2Productivity
If the time for LSB is reduced to 1/512th of the color portion at high frame rates, then more bit-planes can be processed, but micromirror settling time distorts the amount of light reflected during the LSB
Solution Approach 1:
The patent implements periodic action by alternating between illumination periods and settling periods in a regular cycle. The illumination is turned off during settling periods and turned back on after settling, creating a periodic pattern that ensures reliable light output while maintaining high bit-plane processing speed.
Solution Approach 2:
The patent applies preliminary action by ensuring that the spatial light modulator has sufficient time to settle before illuminating for the least significant bit-planes. The illumination is stopped during settling periods and resumed after settling, preemptively preventing distortion before it occurs.
3Illumination intensity
If illumination is continuous during all bit-planes, then the display maintains consistent brightness, but settling time causes distortion in the LSB light output
Solution Approach 1:
The patent implements periodic action by alternating between illumination periods and settling periods in a regular cycle. The illumination is turned off during settling periods and turned back on after settling, creating a periodic pattern that ensures reliable light output while maintaining high bit-plane processing speed.
Solution Approach 2:
The patent applies local quality by treating different bit-planes differently based on their significance. The most significant bit-planes receive continuous illumination for consistent brightness, while the least significant bit-planes receive interrupted illumination with settling periods to ensure accuracy. This localized differentiation resolves the contradiction between brightness consistency and LSB accuracy.
Data Source
AI summary
Described examples include a process that includes illuminating a spatial light modulator at a first illumination level during a first bit-plane and stopping illumination at a beginning of a second bit-plane subsequent to the first bit-plane. The process also includes resuming illumination after a settling period of the spatial light modulator at a second illumination level for a time period such that a total illumination energy during the second bit-plane is equivalent to an intended illumination energy for the second bit-plane at the first illumination level and stopping illumination at the second illumination level before a subsequent third bit-plane.


