High-Frequency Chip Interconnect Layout Without Bonding Wires
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Solution Overview
Problem
High-frequency device manufacturing faces challenges due to deteriorated high-frequency characteristics when using bonding wires, which increase costs and electrode sizes, especially with poor alignment accuracy between chips and transmission lines.
Innovation Solution
A method involving the mounting of chips with pillars on a metal base, forming an insulator layer, exposing pillar surfaces, and creating wirings on the insulator layer to transmit high-frequency signals, which reduces costs by avoiding the need for larger electrodes and improving alignment accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding wires are used to connect semiconductor chips to metal base, then electrical connection is achieved, but high-frequency characteristics deteriorate and manufacturing costs increase
Solution Approach 1:
The patent extracts and eliminates the bonding wire from the electrical connection structure. Instead of using bonding wires to connect the semiconductor chip to the metal base, the invention uses direct metal-to-metal contact through plated holes in the insulating frame, thereby removing the source of high-frequency signal degradation and reducing manufacturing complexity
Solution Approach 2:
The patent replaces the mechanical bonding wire connection system with an electrical conduction system through plated holes. The metal plate on the insulating frame with plated holes provides a direct electrical pathway that substitutes the mechanical bonding process, improving high-frequency performance while simplifying the connection mechanism
2Manufacturing precision
If bonding wires are used for electrical connection, then connection is established, but electrode sizes must increase to accommodate poor alignment accuracy
Solution Approach 1:
The patent replaces the bonding wire connection system with an electrical conduction system through plated holes. The metal plate on the insulating frame with plated holes provides a direct electrical pathway that substitutes the mechanical bonding process, improving high-frequency performance while simplifying the connection mechanism
Solution Approach 2:
The patent uses a metal plate pattern on the insulating frame that replicates the electrical connection pathways. The plated holes in the metal plate create a simplified copy of the connection function that does not require precise alignment between separate components, thereby reducing electrode size requirements
3Reliability
If larger electrodes are used to compensate for poor alignment, then connection reliability improves, but chip sizes must increase and costs rise
Solution Approach 1:
The patent extracts and eliminates the bonding wire from the electrical connection structure. Instead of using bonding wires to connect the semiconductor chip to the metal base, the invention uses direct metal-to-metal contact through plated holes in the insulating frame, thereby removing the source of high-frequency signal degradation and reducing manufacturing complexity
Data Source
AI summary
A method of manufacturing a high-frequency device includes mounting a first chip having a first pillar on an upper surface thereof on a metal base, forming an insulator layer covering the first chip on the metal base, exposing an upper surface of the first pillar from the insulator layer, and forming a first wiring connected to the first pillar on the insulator layer and transmitting a high-frequency signal.