High Frequency Power Diode Thin Base Layer Design
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Solution Overview
Problem
Existing welding diodes are limited by high reverse recovery charge and minority carrier lifetime at high frequencies, leading to high switching losses and unsuitability for frequencies above 1 kHz, due to thick base layers and diffusion limitations in manufacturing processes.
Innovation Solution
A high frequency power diode with a thin base layer less than 60 µm, achieved through simultaneous deep diffusion of anode and cathode layers and electron irradiation-induced deep-level traps, allowing for reduced carrier lifetime and switching losses without increasing on-state voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a thick base layer is used in welding diodes, then high current capability and low on-state voltage are achieved, but reverse recovery charge and minority carrier lifetime increase, making the diode unsuitable for high frequency operation
Solution Approach 1:
The patent applies local quality by creating a non-uniform doping profile within the base layer. A heavily doped region is formed adjacent to the cathode layer while the rest of the base layer maintains lower doping concentration. This localized heavy doping reduces reverse recovery charge and carrier lifetime in the critical region near the junction, enabling high frequency operation, while the overall base layer thickness and doping structure preserve high current capability and low on-state voltage.
2Ease of manufacture
If conventional diffusion processes are used to manufacture welding diodes, then cost-effective production is achieved, but the base layer thickness cannot be reduced below a certain limit due to diffusion depth constraints
Solution Approach 1:
The patent applies preliminary action by performing a first diffusion process to create a heavily doped region in the base layer before completing the formation of the cathode layer. This preliminary doping action allows subsequent processing steps to build upon an already-established doping profile, enabling precise control of the final base layer characteristics while maintaining a simplified overall manufacturing process that remains cost-effective.
Solution Approach 2:
The manufacturing process is segmented into multiple diffusion steps: first diffusing dopant into the base layer to create a heavily doped region, then forming the cathode layer with its own doping process. This segmentation allows independent optimization of each region's doping profile and enables precise control of base layer thickness and doping distribution without requiring complete redesign of the manufacturing process.
3Loss of energy
If the base layer thickness is reduced to enable high frequency operation, then switching losses decrease, but the mechanical stability and electrical performance of the diode are compromised
Solution Approach 1:
The patent applies composite materials by creating a base layer with spatially varying doping concentration - a heavily doped region adjacent to the cathode layer combined with a lower doped region extending toward the anode. This composite doping structure within the base layer provides the dual benefit of reduced reverse recovery characteristics (from the heavily doped region) and maintained mechanical stability and electrical performance (from the overall base layer structure with appropriate thickness and gradual doping transition).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables operation at frequencies of 10 kHz or more with low on-state voltage and high current capability, reducing transformer size, cost, space, and weight in welding equipment.
Implementation Method 1
the anode and cathode layers are formed by diffusion of dopants into a semiconductor wafer from opposite sides
Implementation Method 2
electron irradiation-induced deep-level traps
Data Source
AI summary
A high frequency power diode is provided comprising a semiconductor wafer having a first main side (101) and a second main side (102), a first layer (103) of a first conductivity type formed on the first main side (101), a second layer (105) of a second conductivity type formed on the second main side (102) and a third layer (104) of the second conductivity type formed between the first layer (103) and the second layer (105). The first layer (103) has a dopant concentration decreasing from 1019 cm-3 or more adjacent to the first main side (101) of the wafer to 1.5-1015 cm-3 or less at an interface of the first layer (103) with the third layer (104). The second layer (105) has a dopant concentration decreasing from 1019 cm-3 or more adjacent to the second main side (102) of the wafer to 1.5,1015 cm-3 at an interface of the second layer (105) with the third layer (104) and the third layer (104) has a dopant concentration of 1.5·1015 cm-3 or less. The dopant concentration in the first layer (103) at a distance of 50 µm from the first main side (101) and the dopant concentration in the second layer (105) at a distance of 50 µm from the second main side (102) is 1017 cm-3 or more, respectively, and the thickness of the third layer (104) is less than 60 µm.