High-Frequency Telemetry ASIC for Microburst Detection
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Solution Overview
Problem
Existing telemetry solutions in network switches are CPU-intensive and lack the speed and memory capacity to handle high-frequency data collection, especially for ML/AI workloads, leading to missed microbursts and congestion detection inefficiencies.
Innovation Solution
A network device ASIC with a hardware accelerator, such as a DMA hardware accelerator, collects telemetry data from hardware units and writes it to memory, reducing CPU involvement and enabling sampling rates faster than every millisecond.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional CPU-intensive telemetry solutions are used, then device complexity is reduced, but processing speed and sampling rate are insufficient to detect microbursts and high-frequency network changes
Solution Approach 1:
The telemetry system is segmented into distinct functional components: a hardware accelerator for high-speed data collection, a microcontroller for command coordination, and a CPU for analysis. This segmentation allows each component to operate at optimal speeds and complexities, resolving the contradiction between high sampling rate and device complexity.
Solution Approach 2:
A hardware accelerator serves as an intermediary between the network hardware and the CPU. It performs the complex task of high-frequency telemetry data collection and transfer, mediating between the need for high sampling rates and the limitations of CPU-based systems, thereby enabling fast sampling without requiring the entire system to be complex.
2Measurement precision
If sampling rate is increased to detect microbursts, then detection precision improves, but CPU processing capacity is overwhelmed
Solution Approach 1:
The telemetry data collection function is extracted from the CPU and implemented as a dedicated hardware accelerator. This extraction allows high-precision microburst detection through high-rate sampling while preserving CPU processing capacity for analysis and other tasks, as the hardware accelerator handles the data collection independently.
Solution Approach 2:
The hardware accelerator performs self-service by autonomously collecting and transferring telemetry data at high rates without requiring continuous CPU intervention. This self-service capability enables precise measurement of network events while the CPU remains free for higher-level processing, resolving the contradiction between measurement precision and processing capacity.
3Loss of information
If telemetry data is collected at high frequency, then network visibility improves, but data volume and memory requirements increase
Solution Approach 1:
The hardware accelerator performs preliminary action by collecting and buffering telemetry data in high-speed memory before transfer to the CPU. This preliminary data accumulation enables comprehensive network visibility through high-frequency sampling while managing data volume through efficient memory utilization and selective data transfer, preventing memory exhaustion while maintaining high visibility.
Data Source
AI summary
In one embodiment, a system includes a network device application-specific integrated circuit (ASIC), which includes a microcontroller to provide a command to a hardware accelerator to perform a job including gathering telemetry data from at least one hardware unit and write the gathered telemetry data to a memory, and the hardware accelerator to gather the telemetry data from the at least one hardware unit and write the gathered telemetry data to the memory based on the command.