High-Gain Amplifier Feedback Using Low-Valued Resistor Networks

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Solution Overview

Problem

Designing high-gain single-ended to differential conversion circuits in amplifiers without requiring large-valued feedback resistors or a low-noise reference voltage, which poses challenges in silicon implementations due to increased area and cost, and the need for additional power to generate suitable reference voltages.

Innovation Solution

Reusing one amplifier to provide a reference voltage or signal for a feedback network in a signal processing system, utilizing low-valued resistors and various configurations of inverting amplifiers to achieve high gain without the need for multiple reference voltage sources, specifically employing T- or PI-networks without an additional high-performance reference voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If large-valued feedback resistors are used to achieve high gain, then the gain is improved, but the silicon area and cost increase

Engineering Contradiction:
ImprovegainVSAvoidsilicon area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The feedback network is segmented into multiple resistors (R1, R2, R3) arranged in a T-network configuration rather than using a single large-valued feedback resistor. This segmentation allows the same gain function to be achieved with smaller individual resistor values, reducing the total silicon area required while maintaining the high gain performance.

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If T- or PI-networks are used in single-ended circuits to achieve high gain with low-valued resistors, then the resistor area is reduced, but an additional voltage reference is required

Engineering Contradiction:
Improveresistor areaVSAvoidvoltage reference requirement
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The existing fully differential amplifier structure is made to serve dual purposes: it provides both the signal amplification function and generates the necessary voltage reference for the T-network through its inherent differential operation. The amplifier's own output nodes provide the reference voltages needed by the feedback network, eliminating the need for external reference sources.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The fully differential amplifier is designed to perform multiple functions simultaneously: it acts as the main signal amplification stage while also providing the voltage reference signals required by the T-network feedback configuration. This multi-functionality reduces the overall component count and circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If a low-noise voltage reference is generated to connect T- or PI-branches, then the reference quality is improved, but the power consumption and area increase

Engineering Contradiction:
Improvereference voltage qualityVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The fully differential amplifier generates its own voltage reference signals through its natural differential operation, eliminating the need for separate low-noise reference voltage generators. This self-service approach maintains the required reference quality while significantly reducing the additional power consumption and area that would be required for dedicated reference voltage circuits.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8604871B2High gain amplifier method using low-valued resistances
Publication Date: 2013.12.10 DIALOG SEMICON GMBH
  • US8604871B2 patent drawing
  • US8604871B2 patent drawing
  • US8604871B2 patent drawing

AI summary

This invention discloses circuit and methods of a NAND-based 2T-string NOR flash cell structure as a building block for a fast random-read NOR flash memory. The key concept of this new set of bias conditions in cell array improves over the critical concern of punch-through issue when cell is migrating to the more advanced technology node of next generation. The invention adopts a novel preferable symmetrical 2T-string NOR flash cell. Each NAND or NAND like cell of this 2T-string NOR cell is to store 2 bits and is preferable to be made of N-channel device. The cell is preferable to use Fowler-Nordheim Tunneling scheme for both erase and program operations- The invention is to provide a novel 2T-string NOR flash cell structure made of N-channel device offering most flexible erase sizes in unit of byte, page, sector, block and chip with the least program and erase disturbances.