High Impedance ESD Discharge Path in I/O Circuits
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Solution Overview
Problem
Integrated circuits are vulnerable to electrostatic discharge (ESD) events, which can damage silicon junctions and oxide insulators, leading to performance degradation or render the IC inoperable, as existing technologies do not effectively address the need for a discharge path in input/output circuits.
Innovation Solution
The implementation of high impedance discharge paths in input/output circuits through additional impedance elements, such as metal resistors or substrate resistance, between power and ground reference voltages, reduces ESD current and enhances ESD immunity by approximately 50% compared to conventional devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protection circuits are used, then ESD protection is provided, but ESD current is too high causing damage to silicon junctions and oxide insulators
Solution Approach 1:
The patent introduces impedance elements (resistors) as intermediary components in the ESD discharge path between the I/O pad and the ESD protection circuit. These impedance elements act as mediators that limit and control the ESD current flow, reducing the harmful current magnitude while still allowing the ESD protection circuit to function. The impedance elements are positioned strategically in the discharge path to achieve current limiting without completely blocking the ESD protection function.
Solution Approach 2:
The patent changes the electrical parameters of the ESD discharge path by introducing impedance elements with specific resistance values. This parameter change transforms the discharge path from a low-impedance path that allows high ESD current to a high-impedance path that limits ESD current. The impedance elements modify the current flow characteristics, reducing peak current magnitude and rate of rise while maintaining adequate discharge capability.
2Reliability
If ESD protection elements are made larger to handle higher current, then ESD protection capability is improved, but device area increases
Solution Approach 1:
The impedance elements serve as intermediary components that reduce the burden on the ESD protection elements by limiting the ESD current before it reaches them. This allows the ESD protection elements to be smaller in size while still providing adequate protection, as they no longer need to handle the full magnitude of the ESD current alone. The impedance elements share the protection function by pre-limiting the current.
Solution Approach 2:
The ESD protection function is segmented into multiple components: the impedance elements that limit current and the ESD protection elements that provide clamping and discharge capability. This segmentation allows each component to be optimized independently - the impedance elements can be small resistors while the ESD protection elements can be appropriately sized for their specific function, resulting in a more area-efficient overall design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The introduction of high impedance discharge paths effectively reduces ESD current, thereby improving ESD immunity and reducing stress on self-protecting ESD elements, while also minimizing the size of ESD protection elements.
Implementation Method 1
a first impedance element implemented between the first node and the input/output pad; a second impedance element implemented between the second node and the input/output pad
Data Source
AI summary
A circuit for implementing a discharge path in an input/output circuit of an integrated circuit is described. The circuit comprises an input/output pad; a first node coupled to a power reference voltage; a first impedance element implemented between the first node and the input/output pad; a second node coupled to a ground reference voltage; and a second impedance element implemented between the second node and the input/output pad. A method of implementing a discharge path in an input/output circuit of an integrated circuit is also disclosed.