High-κ Barrier Layer for Aluminum Diffusion in Metal Gates
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Solution Overview
Problem
Aluminum diffusion into high-κ metal oxide layers of metal gate stacks leads to threshold voltage shift and leakage, which limits the miniaturization of semiconductor devices and affects their performance.
Innovation Solution
A high-κ barrier layer, comprising materials like amorphous silicon, titanium silicon nitride, tantalum nitride, or titanium tantalum nitride, is formed on the metal gate stack to prevent aluminum diffusion, with a thickness ranging from 5 Å to 30 Å, and an aluminum-containing layer is deposited on top, followed by a thermal treatment to drive atoms into the interfacial silicon oxide layer and form a dipole region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a high-κ titanium nitride (TiN) capping layer is used as a protective layer, then the device structure is simplified and manufacturing is easier, but aluminum diffusion is not prevented, resulting in threshold voltage shift and leakage
Solution Approach 1:
A barrier layer comprising titanium silicon nitride (TiSiN), tantalum nitride (TaN), or titanium tantalum nitride (TiTaN) is introduced between the aluminum-containing layer and the high-κ metal oxide layer. This intermediary barrier layer specifically prevents aluminum diffusion into the high-κ layer, resolving the reliability issue while maintaining compatibility with existing manufacturing processes
Solution Approach 2:
The barrier layer uses composite material compositions such as titanium silicon nitride (TiSiN), tantalum nitride (TaN), or titanium tantalum nitride (TiTaN) that combine multiple elements to achieve both aluminum diffusion prevention and process compatibility, thereby improving reliability without significantly complicating manufacturing
2Productivity
If device dimensions are shrunk to increase functional density, then more structures per unit area are achieved, but control of device structure dimensions becomes more difficult and performance failures increase
Solution Approach 1:
The barrier layer thickness is precisely controlled within the range of 5 Å to 30 Å, and the thermal treatment temperature is set at at least 700° C. These parameter optimizations enable effective aluminum diffusion prevention while maintaining compatibility with scaled device dimensions and existing manufacturing capabilities
3Productivity
If further scaling down of device sizes is performed, then functional density increases, but threshold voltage tuning range is limited by thickness variation
Solution Approach 1:
The barrier layer acts as an intermediary that decouples the aluminum-containing layer from the high-κ metal oxide layer, preventing aluminum diffusion that would otherwise limit threshold voltage tuning. This allows continued scaling while preserving voltage control flexibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents aluminum migration into the underlying metal layer, improving threshold voltage control and reducing leakage, thereby enhancing the performance and reliability of semiconductor devices.
Implementation Method 1
a high-κ barrier layer on the high-κ metal oxide layer... substantially no aluminum from the aluminum-containing layer migrates through the barrier layer into the underlying metal layer
Implementation Method 2
exposing the substrate surface to a thermal treatment at a temperature of at least 700° C. to drive atoms of the interfacial silicon oxide layer into the high-κ metal oxide layer and to form a dipole region
Data Source
AI summary
Embodiments of the present disclosure are related to methods of preventing aluminum diffusion in a metal gate stack (e.g., high-κ metal gate (HKMG) stacks and nMOS FET metal gate stacks). Some embodiments relate to a barrier layer for preventing aluminum diffusion into high-κ metal oxide layers. The barrier layer described herein is configured to reduce threshold voltage (Vt) shift and reduce leakage in the metal gate stacks. Additional embodiments relate to methods of forming a metal gate stack having the barrier layer described herein. The barrier layer may include one or more of amorphous silicon (a-Si), titanium silicon nitride (TiSiN), tantalum nitride (TaN), or titanium tantalum nitride (TiTaN).