High-k Gate Stack Protection Cap for Transition Region Contamination

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Solution Overview

Problem

The scaling down of semiconductor integrated circuits leads to challenges such as contamination of the high-k dielectric layer in the transition region between high and low threshold voltage device regions during manufacturing, affecting the reliability and performance of semiconductor devices.

Innovation Solution

A protection cap is formed using seal liners and spacers to seal the high-k dielectric layer in the transition region, preventing contamination and ensuring the reliability and performance of semiconductor devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the high-k dielectric layer is formed in the transition region during manufacturing, then the device functionality is achieved, but contamination occurs affecting reliability

Engineering Contradiction:
Improvedevice reliabilityVSAvoidcontamination of high-k dielectric layer
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A protection cap structure is formed prior to subsequent manufacturing steps to prevent contamination of the high-k dielectric layer. The protection cap includes a first cap portion covering the high-k dielectric layer in the transition region, created through preliminary deposition of cap material and patterning operations before contamination can occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protection cap acts as an intermediary barrier between the high-k dielectric layer and contaminating substances. This cap structure physically separates the sensitive dielectric layer from harmful factors introduced during subsequent manufacturing processes, allowing the high-k dielectric layer to maintain its integrity without direct exposure to contaminants.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If additional masks are used to prevent contamination, then reliability is improved, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improvedevice reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protection cap formation process is merged with existing manufacturing steps. The cap material deposition is combined with other dielectric layer formation operations, and the patterning of the protection cap is integrated with existing lithography and etching sequences. This consolidation prevents contamination without requiring completely separate additional masks or process modules.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The protection cap structure serves multiple functions: it protects the high-k dielectric layer from contamination, defines the transition region boundaries, and maintains structural integrity during subsequent processing. This multi-functionality reduces the need for separate protective measures and simplifies the overall manufacturing process despite the added reliability requirement.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11855080B2Semiconductor device and method of fabricating the same
Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11855080B2 patent drawing
  • US11855080B2 patent drawing
  • US11855080B2 patent drawing

AI summary

Provided is a semiconductor device including a substrate, an isolation structure, a gate dielectric layer, a high-k dielectric layer, and a protection cap. The substrate includes a first region, a second region, and a transition region located between the first region and the second region. The isolation structure, located in the transition region. The gate dielectric layer is located on the isolation structure. The high-k dielectric layer is located on the isolation structure and extended to cover a sidewall and a surface of the gate dielectric layer. The protection cap is located on a surface and sidewalls of the high-k dielectric layer.