High-k Metal Gate Stack Diffusion Barrier for CMOS Threshold Voltage Control

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Solution Overview

Problem

The use of silicon germanium (SiGe) in semiconductor devices leads to inconsistent threshold voltage shifts in p-FET and undesirable shifts in n-FET devices, which cannot be fully explained by band-gap narrowing or valence band offset, particularly due to the presence of germanium near the high-k dielectric in the n-FET gate stack.

Innovation Solution

Incorporating a diffusion barrier layer between the germanium material layer and the high-k dielectric in the n-FET device to prevent the incorporation and subsequent shift in threshold voltage, while maintaining a germanium material layer in both n-FET and p-FET devices with a high-k dielectric and conductive electrode layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If germanium material layer is used in n-FET device to achieve higher electron mobility, then electron mobility is improved, but threshold voltage shifts undesirably due to germanium diffusion into the high-k dielectric

Engineering Contradiction:
Improveelectron mobilityVSAvoidthreshold voltage control
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

A diffusion barrier layer is introduced as an intermediary between the germanium material layer and the high-k dielectric layer. This barrier layer prevents germanium atoms from diffusing into the dielectric, thereby maintaining stable threshold voltage while allowing the germanium layer to remain in place for high electron mobility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate stack is segmented into distinct functional layers: the germanium material layer for high mobility, the diffusion barrier layer for preventing contamination, and the high-k dielectric layer for gate control. This segmentation allows each layer to perform its specific function without interfering with the others.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If silicon germanium is used in p-FET device to reduce threshold voltage to band edge, then threshold voltage is improved, but flatband voltage shifts due to band-gap modulation

Engineering Contradiction:
Improvethreshold voltage positioningVSAvoidflatband voltage stability
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The band-gap properties of the channel material are modified by incorporating germanium, which changes the electrical parameters including threshold voltage and flatband voltage. The diffusion barrier layer enables these parameter changes to occur in a controlled manner, preventing unwanted voltage shifts.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If germanium is incorporated near the high-k dielectric to achieve voltage shifts, then voltage tuning is achieved, but inconsistent threshold voltage shifts occur between devices

Engineering Contradiction:
Improvevoltage tuning capabilityVSAvoidthreshold voltage consistency
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The diffusion barrier layer serves as a mediator that controls the interaction between germanium and the high-k dielectric. It allows voltage tuning through controlled germanium proximity while preventing the inconsistent threshold voltage shifts that occur when germanium directly contacts the dielectric.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach stabilizes the threshold voltage of n-FET devices, allows for higher electron and hole mobility channels without compromising threshold voltage, and simplifies integration by preventing germanium diffusion into the high-k dielectric, thus addressing the inconsistencies in voltage shifts caused by SiGe.

Implementation Method 1

Incorporating a diffusion barrier layer between the germanium material layer and the high-k dielectric in the n-FET device to prevent the incorporation and subsequent shift in threshold voltage

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS8835260B2Control of threshold voltages in high-k metal gate stack and structures for CMOS devices
Publication Date: 2014.09.16 GLOBALFOUNDRIES US INC
  • US8835260B2 patent drawing
  • US8835260B2 patent drawing
  • US8835260B2 patent drawing

AI summary

A high-k metal gate stack and structures for CMOS devices and a method for forming the devices. The gate stack includes a germanium (Ge) material layer formed on the semiconductor substrate, a diffusion barrier layer formed on the Ge material layer, a high-k dielectric having a high dielectric constant greater than approximately 3.9 formed over the diffusion barrier layer, and a conductive electrode layer formed above the high-k dielectric layer.