High-k Gate Insulation Layer Defect Neutralization

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Solution Overview

Problem

The use of high-dielectric constant (high-k) gate insulation layers in semiconductor devices can lead to changes in threshold voltage and flat band voltage, adversely affecting electrical characteristics.

Innovation Solution

A method involving the formation of a sacrificial layer with impurities on the gate insulation layer, followed by annealing to diffuse these impurities into the high-k gate insulation layer, and subsequent removal of the sacrificial layer to form a gate electrode, which helps in neutralizing defects and maintaining optimal electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If a high-k gate insulation layer is used to increase integration density, then the dielectric constant is improved, but the threshold voltage changes and flat band voltage increases

Engineering Contradiction:

Improvedielectric constantVSAvoidelectrical characteristics

Core Design Contradiction:

Length of stationary objectVSReliability

Solution Approach 1:

A sacrificial layer containing impurities is formed on the high-k gate insulation layer before the gate electrode is formed. This preliminary action allows impurities to be introduced into the gate insulation layer in advance, which will later neutralize defects and adjust electrical characteristics when the sacrificial layer is removed and the gate electrode is formed.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The sacrificial layer acts as an intermediary medium to transfer impurities from the sacrificial layer material into the high-k gate insulation layer. This intermediary approach allows controlled introduction of impurities without directly contaminating the gate insulation layer during subsequent processing steps.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If a high-k gate insulation layer is used to increase integration density, then the integration density is improved, but the flat band voltage increases

Engineering Contradiction:

Improveintegration densityVSAvoidflat band voltage

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The sacrificial layer with impurities is formed preliminarily on the high-k gate insulation layer before gate electrode formation. When annealed, the impurities diffuse into the gate insulation layer to neutralize defects that would otherwise cause flat band voltage increase, thus preserving electrical characteristics while maintaining high integration density.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The high-k material inherently causes defects and flat band voltage increase (harm), but by introducing impurities through the sacrificial layer, these defects are neutralized (benefit). The harmful effect of high-k material is thus converted into a beneficial outcome where high integration density is achieved without sacrificing electrical characteristics.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If a high-k gate insulation layer is used to increase integration density, then the integration density is improved, but the threshold voltage changes

Engineering Contradiction:

Improveintegration densityVSAvoidthreshold voltage

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The sacrificial layer containing impurities is formed in advance on the high-k gate insulation layer. During annealing, impurities diffuse into the gate insulation layer to neutralize defects that would cause threshold voltage shifts, ensuring stable electrical characteristics while maintaining high integration density benefits.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The sacrificial layer serves as an intermediary vehicle to deliver impurities to the high-k gate insulation layer. This mediated approach allows precise control over impurity introduction, enabling threshold voltage stabilization without compromising the high integration density achieved through high-k material usage.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively neutralizes defects in the high-k gate insulation layer, preventing a reduction in flat band voltage and an increase in threshold voltage, thereby ensuring semiconductor devices with excellent electrical characteristics.

Implementation Method 1

annealing the sacrificial layer so that the impurities in the sacrificial layer diffuse into the gate insulation layer

Methodology Applied

Scientific EffectAnnealing: Annealing

Implementation Method 2

the impurities in the sacrificial layer diffuse into the gate insulation layer

Methodology Applied

Scientific EffectDiffusion: Diffusion

Data Source

PatentUS8785267B2Methods of manufacturing semiconductor devices including transistors

Publication Date: 2014.07.22 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of manufacturing a semiconductor device includes forming a gate insulation layer pattern on a substrate, forming a sacrificial layer including impurities on the gate insulation layer pattern, annealing the sacrificial layer so that the impurities in the sacrificial layer diffuse into the gate insulation layer pattern, removing the sacrificial layer, and forming a gate electrode on the gate insulation layer pattern.