High-K Gate Structures With REM Doping for Threshold Voltage Tuning
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling down FETs while maintaining low threshold voltages and achieving cost-effective manufacturing of gate structures with nanostructured channel regions.
Innovation Solution
The method involves forming NFETs and PFETs with different gate structure configurations on the same substrate by doping high-K gate dielectric layers with varying concentrations of rare-earth metal (REM)-based dopants, which generate dipole layers that adjust the effective work function values and threshold voltages without increasing the thickness of the work function metal layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If FET dimensions are scaled down to increase storage capacity and processing speed, then device performance and storage density are improved, but manufacturing complexity increases
Solution Approach 1:
The patent changes the chemical composition parameters of the gate dielectric layer by incorporating rare-earth metal oxides (such as lanthanum, gadolinium, terbium) into the high-k dielectric material. This compositional parameter change enables the gate structure to maintain low threshold voltages in scaled-down devices without requiring complex multi-layer gate stacks, thus improving device performance while managing manufacturing complexity
Solution Approach 2:
The patent uses composite gate dielectric materials formed by combining high-k dielectric materials with rare-earth metal oxides. This composite approach creates a gate structure with tailored electrical properties that achieve low threshold voltages in miniaturized FETs, resolving the contradiction between device scaling and manufacturing complexity
2Manufacturing precision
If work function metal layer thickness is increased to adjust threshold voltage, then threshold voltage control is improved, but gate stack dimensions increase
Solution Approach 1:
The patent changes the dielectric constant parameter of the gate dielectric layer by using high-k materials with rare-earth metal oxide additions. This parameter change allows the gate structure to achieve better threshold voltage control through dielectric property modification rather than increasing metal layer thickness, thus maintaining precise threshold voltage control while keeping gate stack dimensions small
Solution Approach 2:
The rare-earth metal oxide-doped high-k dielectric layer acts as an intermediary that mediates between the semiconductor channel and the work function metal layer. This intermediary layer provides the necessary electrical control function, allowing threshold voltage adjustment without directly increasing the work function metal layer thickness or overall gate stack dimension
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the fabrication of FETs with different and low threshold voltages, achieving more cost-effective and less complicated manufacturing processes while maintaining smaller gate stack dimensions.
Implementation Method 1
doping high-K gate dielectric layers with varying concentrations of rare-earth metal (REM)-based dopants, which generate dipole layers that adjust the effective work function values and threshold voltages
Data Source
AI summary
A semiconductor device with different gate structure configurations and a method of fabricating the semiconductor device are disclosed. The method includes depositing a high-K dielectric layer surrounding nanostructured channel regions, performing a first doping with a rare-earth metal (REM)-based dopant on first and second portions of the high-K dielectric layer, and performing a second doping with the REM-based dopants on the first portions of the high-K dielectric layer and third portions of the high-K dielectric layer. The first doping dopes the first and second portions of the high-K dielectric layer with a first REM-based dopant concentration. The second doping dopes the first and third portions of the high-K dielectric layer with a second REM-based dopant concentration different from the first REM-based dopant concentration. The method further includes depositing a work function metal layer on the high-K dielectric layer and depositing a metal fill layer on the work function metal layer