High-k Gate Insulator Silicon Diffusion for Leakage Reduction
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Solution Overview
Problem
As MOS transistor feature sizes decrease, the capacitance between the gate and channel in semiconductor devices needs to be increased to improve operating characteristics, and existing methods struggle to achieve this effectively.
Innovation Solution
A fabricating method involving the stacking of a high-k dielectric film without silicon and an insulating film containing silicon on a substrate, followed by annealing to diffuse silicon from the insulating film into the high-k dielectric film, forming a gate insulating film with a silicon concentration gradient, which includes materials like HfO2 and ZrO2, and further incorporating nitrogen diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the feature size of MOS transistors is reduced, then the integration density is improved, but the capacitance between gate and channel decreases
Solution Approach 1:
The patent changes the dielectric constant parameter by using high-k dielectric materials (such as HfO2, ZrO2, Ta2O5) instead of traditional SiO2. This allows the gate insulating film to achieve higher capacitance even when the physical thickness is reduced, thereby maintaining the capacitance between gate and channel despite the reduction in feature size and improving integration density.
Solution Approach 2:
The patent employs composite gate insulating film structures combining multiple materials with different properties. Specifically, it uses a first gate insulating film (high-k dielectric material without Si) and a second gate insulating film (silicon-containing dielectric material), creating a composite structure that leverages the high dielectric constant of the first layer and the interface quality of the second layer to achieve both high capacitance and good reliability.
2Reliability
If high-k dielectric materials are used to increase capacitance, then the operating characteristics are improved, but the manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary actions by forming the high-k dielectric film first, then selectively adding silicon-containing materials in subsequent steps. The interface preparation and initial high-k film formation are performed in advance to ensure proper crystalline structure and reduce defects before final gate electrode formation, thereby managing manufacturing complexity while achieving improved operating characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the dielectric constant of the gate insulating film, reduces gate leakage current, improves bias-temperature instability, and suppresses time-dependent dielectric breakdown, thereby improving the operating characteristics of semiconductor devices.
Implementation Method 1
diffusing Si contained in the insulating film into the high-k dielectric film by annealing the substrate having the high-k dielectric film and the insulating film stacked thereon
Implementation Method 2
annealing the substrate having the first film and the second film stacked thereon, thereby forming a gate insulating film containing Si and including the first film and the second film
Implementation Method 3
enhances the dielectric constant of the gate insulating film, reduces gate leakage current
Implementation Method 4
diffusing nitrogen into the gate insulating film
Data Source
AI summary
A fabricating method of a semiconductor device includes stacking a high-k dielectric film not containing silicon (Si) and an insulating film containing silicon (Si) on a substrate, and diffusing Si contained in the insulating film into the high-k dielectric film by annealing the substrate having the high-k dielectric film and the insulating film stacked thereon.