High-K Gate Electrode Spacer Formation for Tapering Control
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Solution Overview
Problem
The replacement of conventional polysilicon/silicon dioxide gate electrode structures with high-k metal gate structures in advanced transistor manufacturing stages faces challenges due to tapering issues, leading to deposition-related irregularities and reliability problems, especially when forming sophisticated gate electrode structures with high-k dielectric materials and metal-containing electrodes.
Innovation Solution
The method involves reducing the degree of tapering in openings by depositing a material layer and performing anisotropic etching before depositing the metal-containing electrode material, or using the electrode material itself to form a conductive sidewall spacer, thereby enhancing deposition conditions and ensuring reliable filling of the opening.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional polysilicon/silicon dioxide gate electrode structures are replaced with high-k metal gate structures, then transistor performance is improved, but deposition-related irregularities and reliability problems occur due to tapering issues
Solution Approach 1:
The patent performs preliminary actions by depositing a spacer material layer and forming sidewall spacers before depositing the metal gate electrode material. This preliminary structure formation modifies the opening geometry to reduce tapering effects, ensuring that subsequent metal deposition occurs on a more uniform substrate, thereby preventing deposition-related irregularities while maintaining high-k metal gate structure reliability
Solution Approach 2:
The patent introduces sidewall spacers as intermediary structures between the opening formation and metal gate deposition. These spacers act as mediators that modify the deposition environment by providing a more uniform surface geometry, thereby eliminating the harmful tapering effect that causes deposition irregularities and reliability problems in direct high-k metal gate formation
2Manufacturing precision
If material layer deposition and anisotropic etching are performed before metal electrode deposition, then tapering degree is reduced and deposition conditions are enhanced, but process complexity increases
Solution Approach 1:
The patent segments the gate electrode formation process into distinct stages: (1) spacer material deposition, (2) anisotropic etching to form sidewall spacers, (3) metal gate material deposition. This segmentation allows precise control of tapering at each stage while maintaining overall process manageability through clear separation of functions
Solution Approach 2:
The patent changes physical parameters by performing anisotropic etching to selectively remove spacer material and create sidewall spacers with controlled geometry. This parameter change in the opening structure (from tapered to more uniform walls) directly improves subsequent metal deposition conditions while the added process steps remain manageable through standard semiconductor fabrication techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces deposition-related irregularities and enhances the reliability of the gate electrode structure, maintaining compatibility with conventional CMOS integration regimes and avoiding yield losses associated with conventional process strategies.
Implementation Method 1
performing anisotropic etching before depositing the metal-containing electrode material
Implementation Method 2
depositing a material layer and performing anisotropic etching
Data Source
AI summary
During a replacement gate approach, the inverse tapering of the opening obtained after removal of the polysilicon material may be reduced by depositing a spacer layer and forming corresponding spacer elements on inner sidewalls of the opening. Consequently, the metal-containing gate electrode material and the high-k dielectric material may be deposited with enhanced reliability.