High-K Gate Stack Dipole Induction Layer for Threshold Voltage Control
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Solution Overview
Problem
High-K gate stacks in MOSFET devices face challenges in controlling threshold voltage and channel carrier mobility due to mobility degradation caused by remote phonon scattering and charge trapping, with existing solutions either affecting both nFET and pFET devices or limiting device scalability.
Innovation Solution
A method involving the formation of a high-K gate stack with a dipole induction layer, comprising a high-K metallic oxide with higher oxygen vacancy affinity and lower diffusivity, positioned between the gate electrode and substrate to control threshold voltage and improve mobility by accumulating oxygen vacancies and creating a dipole field, applicable to both n-type and p-type devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-K metallic oxide layers are formed on silicon substrate to increase dielectric constant, then gate leakage is reduced, but channel carrier mobility is severely degraded due to remote phonon scattering
Solution Approach 1:
A dipole induction layer is introduced as an intermediary between the high-K metallic oxide gate dielectric and the silicon channel. This layer creates a dipole field that repels oxygen vacancies and phonons away from the channel interface, thereby reducing remote phonon scattering and improving carrier mobility while maintaining the high dielectric constant benefit of the gate stack
Solution Approach 2:
The dipole induction layer is positioned specifically at the critical interface region between the gate dielectric and silicon channel, where it locally modifies the electric field distribution and phonon scattering characteristics without affecting the bulk properties of the high-K dielectric material
2Adaptability or versatility
If HfO2 gate dielectric is used to achieve high dielectric constant, then device scalability is improved, but threshold voltage control becomes difficult due to charge trapping
Solution Approach 1:
The dipole induction layer acts as a mediator that prevents charge trapping at the high-K dielectric/silicon interface by creating a dipole field that repels oxygen vacancies and trapped charges, thereby enabling precise threshold voltage control while maintaining the scalability benefits of HfO2 gate dielectric
Solution Approach 2:
The dipole induction layer converts the potentially harmful effect of oxygen vacancies and charge trapping into a beneficial dipole field that improves threshold voltage control by repelling charges away from the channel interface
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively shifts the threshold voltage to a desired level and enhances channel mobility by confining oxygen vacancies, providing a flexible and efficient mechanism for both nFET and pFET devices, while maintaining device scalability.
Implementation Method 1
forming a composite layer directly on the first layer, the composite layer including a second high-K metallic oxide layer formed directly on a dipole induction layer, the dipole induction layer including a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers
Implementation Method 2
the dipole induction layer including a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers
Data Source
AI summary
A method of forming a high-K gate stack for a MOSFET device to control the threshold voltage for the MOSFET device. A first high-K metallic oxide layer is formed on a semiconductor substrate. At least one composite layer is then formed directly on the first layer. The composite layer is composed of a second high-K metallic oxide layer formed directly on a dipole induction layer. The dipole induction layer includes a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers. A metallic gate electrode is then formed on the composite layer. Formation of the various layers is such as to position the dipole induction layer of the composite layer between the gate electrode and substrate so as to shift the threshold voltage to a desired level. A high-K gate stack in a MOSFET device formed by the above method is also provided.