High-K Metal Gate CMOS With Rare Earth Work Function Control
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Solution Overview
Problem
Current MOSFET scaling efforts face challenges in achieving low threshold voltage and efficient performance due to limitations in dielectric materials and gate structures, particularly in CMOS devices where high-k dielectrics and rare earth metals are not optimally integrated for both n-type and p-type devices.
Innovation Solution
The integration of a substrate with p-type and n-type device regions, where the n-type regions feature a rare earth metal gate structure atop a high-k dielectric and the p-type regions include a Ge-containing layer, allowing for independent work function adjustments and optimized gate structures for low threshold voltage CMOS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-k dielectric materials are used to increase dielectric constant, then device performance is improved, but manufacturing complexity increases due to integration challenges with rare earth metals and Ge-containing layers
Solution Approach 1:
The gate structure is segmented into distinct functional layers: high-k dielectric layer for electrical performance, rare earth metal layer for work function control, and Ge-containing layer for threshold voltage adjustment. Each layer performs a specific function, allowing independent optimization of device characteristics while managing manufacturing complexity through modular integration
Solution Approach 2:
The gate structure employs a composite material system combining high-k dielectric materials with rare earth metals and Ge-containing layers. This composite approach enables simultaneous achievement of high dielectric constant, appropriate work function, and adjustable threshold voltage, resolving the contradiction between improved device performance and manufacturing complexity by integrating multiple material properties into a unified structure
2Adaptability or versatility
If rare earth metals are integrated into gate structures, then work function adjustment is improved, but manufacturing precision requirements increase
Solution Approach 1:
Rare earth metals are selectively integrated into specific regions of the gate structure where work function adjustment is required. The rare earth metal layer is positioned between the high-k dielectric and the Ge-containing layer, creating localized functional zones that enable precise work function control without requiring uniform precision across the entire device structure
Solution Approach 2:
The work function is adjusted by changing the compositional parameter of the gate structure through rare earth metal integration. By varying the concentration and distribution of rare earth metals within the gate stack, the work function can be tuned to achieve desired device characteristics, reducing manufacturing precision requirements through parameter optimization rather than strict dimensional control
3Adaptability or versatility
If Ge-containing layers are added to p-type device channels, then threshold voltage control is improved, but device structure complexity increases
Solution Approach 1:
The Ge-containing layer is incorporated into the channel structure during the preliminary fabrication stages, before final gate patterning and metallization. This preliminary integration allows the Ge layer to serve as a foundation for subsequent gate structure formation, enabling threshold voltage control to be established early in the manufacturing process and reducing overall device structure complexity
Solution Approach 2:
The Ge-containing layer serves multiple functions: it provides threshold voltage control through bandgap engineering, acts as a buffer layer between the substrate and gate structure, and enables strain engineering to improve carrier mobility. This multi-functionality reduces the need for additional separate structures, thereby managing device complexity while achieving improved threshold voltage control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of low threshold voltage CMOS devices with improved performance by integrating thick dielectric layers and rare earth metals, suitable for both analog and digital applications, enhancing switching speed and power efficiency.
Implementation Method 1
a first gate structure having at least a first high-k dielectric
Implementation Method 2
a gate structure is energized to create an electric field in an underlying channel region
Implementation Method 3
at least one rare earth metal present atop the first high-k dielectric
Implementation Method 4
independent work function adjustments
Implementation Method 5
a device channel including a Ge-containing layer
Implementation Method 6
SiGe band gap engineering to provide low threshold voltage p-type devices
Data Source
AI summary
A method of forming a semiconductor device is provided that includes forming a Ge-containing layer atop a p-type device regions of the substrate. Thereafter, a first dielectric layer is formed in a second portion of a substrate, and a second dielectric layer is formed overlying the first dielectric layer in the second portion of the substrate and overlying a first portion of the substrate. Gate structures may then formed atop the p-type device regions and n-type device regions of the substrate, in which the gate structures to the n-type device regions include a rare earth metal.